EPC1LC20CEC vs EPC2LC20 Vergleich
Detaillierter Direktvergleich von EPC1LC20CEC von Altera und EPC2LC20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC1LC20CEC | EPC2LC20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,20 | $7,20 |
| Speichertyp | OTP Configuration PROM (anti-fuse) | Non-volatile configuration PROM |
| Speichergröße | 1 Mbit (1,048,576 bits) | 1.6 Mbit |
| Configuration Interface | Serial (4-pin: DATA, DCLK, nCS, OE) | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Maximale Taktfrequenz | 8 MHz | — |
| Programming Mode | One-Time Programmable (OTP) | — |
| Gehäuse | 20-pin PLCC (9x9 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Betriebstemperatur | 0°C to +70°C | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Versorgungsspannung | [DATA_NEEDED: VCC range] | — |
| Configuration Mode | Altera serial slave/master | — |
| Compatible FPGA Families | ACEX 1K, APEX 20K, FLEX 6000, FLEX 8000, FLEX 10K | — |
| Read Endurance | Unlimited | — |
| Program Endurance | 1 cycle (OTP) | — |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount |
| RoHS-Status | Non-compliant (legacy PLCC package) | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free | No (contains lead) | — |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |