EPC1P18N vs EPC2LC20 Vergleich
Detaillierter Direktvergleich von EPC1P18N von Altera und EPC2LC20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC1P18N | EPC2LC20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,45 | $7,20 |
| Manufacturer | Altera (Intel Programmable Solutions Group) | — |
| Part Number | EPC1P18N | — |
| Funktion | Configuration Device for SRAM-based LUT Devices | — |
| Speichergröße | 1 Mbit | 1.6 Mbit |
| Programmable Type | OTP (One-Time Programmable) | — |
| Supply Voltage - Low | 3 V to 3.6 V | — |
| Supply Voltage - High | 4.5 V to 5.5 V | — |
| Configuration Interface | Altera proprietary serial | Serial (x1) to FPGA via DCLK/nCONFIG/nSTATUS/CONF_DONE |
| Betriebstemperatur | -40 C to +85 C | -40C to +85C (industrial) [DATA_NEEDED: exact grade from datasheet] |
| Gehäuse | 8-DIP (0.300 inch, 7.62 mm) | 20-pin PLCC (J-lead, 9x9 mm) |
| Pin-Anzahl | 8 | — |
| Packaging | Tube | — |
| Montageart | Through-Hole | Surface Mount |
| Family Member | EPC1 series | — |
| Compatible FPGA Families | Cyclone, APEX 20K, ACEX 1K, Mercury | — |
| Speichertyp | — | Non-volatile configuration PROM |
| Programming Interface | — | IEEE 1149.1 (JTAG) ISP, 5.0-V and 3.3-V tolerant |
| Supply Voltage VCC | — | 3.0 V to 3.6 V (3.3-V operation) |
| ISP Voltage Range | — | 5.0 V or 3.3 V |
| Supported FPGA Families | — | ACEX 1K, APEX 20K/20KC/20KE, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, MAX 9000 |
| Cascade Support | — | Yes - daisy-chain multiple EPC2 devices via JTAG for larger bitstreams |
| RoHS-Status | — | Non-Compliant (original Altera Pb-containing part) |
| Lead-Free Version | — | EPC2LC20N available as lead-free equivalent |
| Programming Support | — | Altera Programming Unit (APU), Quartus II, JTAG programmer |
| Boundary-Scan | — | IEEE 1149.1 compliant, 8-bit or 16-bit JTAG |