EPC21LC20 vs EPC20LC20U Vergleich
Detaillierter Direktvergleich von EPC21LC20 von Intel und EPC20LC20U von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC21LC20 | EPC20LC20U |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,40 | $8,20 |
| Speichertyp | Serial Configuration PROM (Flash-based, in-system programmable) | Non-volatile configuration memory |
| Density | 2 Mb (2,097,152 bits) | — |
| Configuration Mode Supported | Serial (PS) for Altera SRAM-based LUT FPGAs | — |
| Maximum DCLK Frequency | 10 MHz | — |
| Access Time | approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure] | — |
| Programming Interface | IEEE 1149.1 (JTAG) | — |
| Program/Erase Endurance | 100 cycles minimum [DATA_NEEDED: confirm from datasheet] | — |
| Operating Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| Standby Current | [DATA_NEEDED: ICCSB value] | — |
| Active Read Current | [DATA_NEEDED: ICC active current] | — |
| Operating Temperature (commercial) | 0 °C to +70 °C (LC suffix) | — |
| Operating Temperature (industrial) | [DATA_NEEDED: -40 to +85 °C for LI variant] | — |
| Gehäuse / Bauform | 20-pin PLCC (J-lead, JEDEC MS-018) | — |
| Montageart | Surface Mount (PLCC socket or solder) | Surface Mount (PLCC socket compatible) |
| MSL-Level | [DATA_NEEDED: confirm moisture sensitivity level] | — |
| RoHS-Status | [DATA_NEEDED: confirm from Altera product page] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free (Pb-free) | [DATA_NEEDED: confirm] | — |
| Compatible FPGA Families | ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT) | Altera FLEX 6000, FLEX 8000, FLEX 10K, APEX, ACEX, early Cyclone |
| JTAG Boundary-Scan Compliant | Yes (IEEE Std 1149.1) | — |
| Data Width | 1 bit (serial DATA output) | — |
| Manufacturer | — | Altera Corporation (now Intel) |
| Funktion | — | FPGA Configuration Device (Serial Configuration PROM) |
| Configuration Interface | — | Serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, OE) |
| Operating Voltage | — | 5.0 V (typical) |
| Absolute Maximum DC Input | — | -0.3 V to 7.0 V |
| Transient Input Tolerance | — | -2.0 V undershoot to 7.0 V overshoot (<100 mA, <20 ns) |
| Package Type | — | PLCC-20 (J-lead, plastic leaded chip carrier) |
| Pin-Anzahl | — | 20 |
| In-System Programming | — | Supported via JTAG / Quartus programmer |
| Betriebstemperaturbereich | — | [DATA_NEEDED: industrial/commercial grade] |
| Lead-Free / Halogen-Free | — | [DATA_NEEDED: lead-free status] |
| Lebenszyklusstatus | — | Obsolete / Last-time-buy in distribution |