EPC21LC20 vs EPC22C20N Vergleich
Detaillierter Direktvergleich von EPC21LC20 von Intel und EPC22C20N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC21LC20 | EPC22C20N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,40 | $11,40 |
| Speichertyp | Serial Configuration PROM (Flash-based, in-system programmable) | — |
| Density | 2 Mb (2,097,152 bits) | — |
| Configuration Mode Supported | Serial (PS) for Altera SRAM-based LUT FPGAs | — |
| Maximum DCLK Frequency | 10 MHz | — |
| Access Time | approximately 35 ns [DATA_NEEDED: confirm exact datasheet figure] | — |
| Programming Interface | IEEE 1149.1 (JTAG) | IEEE 1149.1 JTAG (in-system programmable) |
| Program/Erase Endurance | 100 cycles minimum [DATA_NEEDED: confirm from datasheet] | — |
| Operating Voltage (VCC) | 3.0 V to 3.6 V (3.3 V typical) | — |
| Standby Current | [DATA_NEEDED: ICCSB value] | — |
| Active Read Current | [DATA_NEEDED: ICC active current] | — |
| Operating Temperature (commercial) | 0 °C to +70 °C (LC suffix) | — |
| Operating Temperature (industrial) | [DATA_NEEDED: -40 to +85 °C for LI variant] | — |
| Gehäuse / Bauform | 20-pin PLCC (J-lead, JEDEC MS-018) | — |
| Montageart | Surface Mount (PLCC socket or solder) | Surface Mount / Socket |
| MSL-Level | [DATA_NEEDED: confirm moisture sensitivity level] | — |
| RoHS-Status | [DATA_NEEDED: confirm from Altera product page] | [DATA_NEEDED: RoHS status] |
| Lead-Free (Pb-free) | [DATA_NEEDED: confirm] | — |
| Compatible FPGA Families | ACEX, APEX, Cyclone, FLEX, Mercury, Stratix (SRAM-based LUT) | — |
| JTAG Boundary-Scan Compliant | Yes (IEEE Std 1149.1) | — |
| Data Width | 1 bit (serial DATA output) | — |
| Manufacturer | — | Intel (formerly Altera) |
| Device Type | — | Configuration PROM for SRAM-based LUT FPGAs |
| Target FPGA Family | — | FLEX 10K, FLEX 6000, APEX 20K series |
| Configuration Interface | — | Serial (DCLK / DATA0 / nCONFIG / nSTATUS / CONF_DONE) |
| Versorgungsspannung | — | 3.3 V or 5 V |
| Gehäuse | — | 20-pin PLCC (J-lead) |
| Package Marking Code | — | EPC22C20N |
| Pin-Anzahl | — | 20 |
| Betriebstemperatur | — | [DATA_NEEDED: operating temperature range] |
| Bitstream Capacity | — | [DATA_NEEDED: bitstream capacity in bits] |
| Configuration Time | — | [DATA_NEEDED: typical configuration time] |
| Lead-Free Status | — | [DATA_NEEDED: lead-free status] |
| Lebenszyklusstatus | — | Obsolete (last-time-buy from Altera announced for legacy configuration devices) |