EPC2L20 vs EPC2L20N Vergleich
Detaillierter Direktvergleich von EPC2L20 von Altera und EPC2L20N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2L20 | EPC2L20N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $25,80 | $17,20 |
| Speichertyp | Configuration PROM (non-volatile) | — |
| Speichergröße | 1.6 Mbit | 1.6 Mbit |
| Speicherorganisation | 8-bit byte | — |
| Schnittstelle | Serial FPGA configuration + JTAG (IEEE 1149.1 / IEEE 1532) | — |
| Programmability | In-system programmable via JTAG | — |
| Core Supply Voltage (VCCINT) | 3.3 V | — |
| I/O Supply Voltage (VCCIO) | 3.3 V or 5.0 V (VCCSEL selectable) | — |
| Cascade Support | Yes - multi-device daisy chain | Yes (multi-PROM chain via CE control) |
| Boundary Scan | JTAG IEEE 1149.1 BST | — |
| Gehäuse | 20-pin PLCC (J-lead) | — |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount (J-Lead PLCC) |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial) |
| MSL-Level | [DATA_NEEDED: MSL rating] | 3 (168 hours) |
| RoHS-Status | RoHS Compliant (per IC Components listing) | Compliant |
| Process Technology | Low-power CMOS | — |
| Target FPGAs | APEX II, APEX 20K, Mercury, ACEX 1K, Cyclone, Stratix | — |
| Funktion | — | In-System Programmable Configuration PROM for SRAM-based LUT FPGAs |
| Programmable Type | — | In System Programmable (ISP) |
| Supply Voltage - VCCINT/VCCIO | — | 3.0 V to 3.6 V or 4.5 V to 5.5 V |
| Gehäuse / Bauform | — | 20-LCC (J-Lead), PLCC-20 |
| Packaging | — | Tube |
| Supported FPGA Families | — | Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) |
| Configuration Interface | — | Serial (Altera FPP / PS configuration scheme) |
| Programming Method | — | In-system via 4-wire ISP / JTAG-style |
| Pin-Anzahl | — | 20 |
| Lead Finish | — | Matte Tin (Pb-free) |