EPC2L20N vs EPC2LI20N Vergleich
Detaillierter Direktvergleich von EPC2L20N von Altera und EPC2LI20N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2L20N | EPC2LI20N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $17,20 | $5,10 |
| Funktion | In-System Programmable Configuration PROM for SRAM-based LUT FPGAs | — |
| Speichergröße | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (ISP) | In System Programmable (ISP via JTAG) |
| Supply Voltage - VCCINT/VCCIO | 3.0 V to 3.6 V or 4.5 V to 5.5 V | — |
| Gehäuse / Bauform | 20-LCC (J-Lead), PLCC-20 | 20-PLCC (J-Lead), 9x9 mm |
| Packaging | Tube | Tube |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: operating temperature range] |
| Supported FPGA Families | Altera APEX, ACEX, Cyclone, FLEX 10K, Mercury (per datasheet) | — |
| Configuration Interface | Serial (Altera FPP / PS configuration scheme) | — |
| Cascade Support | Yes (multi-PROM chain via CE control) | — |
| Programming Method | In-system via 4-wire ISP / JTAG-style | — |
| Montageart | Surface Mount (J-Lead PLCC) | Surface Mount |
| Pin-Anzahl | 20 | — |
| Lead Finish | Matte Tin (Pb-free) | — |
| MSL-Level | 3 (168 hours) | — |
| RoHS-Status | Compliant | [DATA_NEEDED: RoHS status] |
| Speichertyp | — | Non-volatile configuration PROM (Flash) |
| Configuration Mode | — | Serial |
| Maximum Configuration Frequency | — | 10 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V |
| Supply Voltage (VCCIO) | — | 4.5 V to 5.5 V |
| Supported FPGA Series | — | ACEX 1K, APEX II, Cyclone, Stratix II |
| JTAG Interface | — | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) |
| Configuration Pins | — | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE |