EPC2LC120 vs EPC1LC120 Vergleich
Detaillierter Direktvergleich von EPC2LC120 von Altera und EPC1LC120 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LC120 | EPC1LC120 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $9,30 |
| Funktion | FPGA Configuration Memory Device | — |
| Memory Density | 2 Mbit | 1 Mbit |
| Compatible FPGA Families | FLEX, ACEX, APEX, Mercury (Altera) | — |
| Gehäuse | PLCC-120 | LQFP-120 (Low-profile Quad Flat Pack) |
| Pin-Anzahl | 120 | — |
| Versorgungsspannung | 3.3 V | [DATA_NEEDED: VCC range] |
| Programming Interface | JTAG IEEE 1149.1 | — |
| Configuration Modes | PS (serial), PPA (parallel), multi-device daisy chain | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | — |
| Storage Temperature | [DATA_NEEDED: storage temperature] | — |
| Montageart | Surface Mount / Socket | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: MSL rating] |
| Lead-Free / RoHS | [DATA_NEEDED: RoHS status] | — |
| Data Compression Support | Yes (Altera proprietary, up to 2:1) | — |
| Remote Update Support | Yes (via JTAG multi-mode protocol) | — |
| Speichertyp | — | Serial Configuration Memory (Flash-based, non-volatile) |
| Serial Clock Frequency (DCLK) | — | 8 MHz |
| Supported FPGA Families | — | APEX 20K, ACEX 1K, Cyclone, MAX, Mercury, Stratix-class |
| Schnittstelle | — | Altera / Intel proprietary FPGA-configuration serial bus (DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE) |
| Betriebstemperaturbereich | — | [DATA_NEEDED: operating temperature range] |
| Programming | — | Factory / JTAG via Altera programming tools |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Configuration Mode | — | Serial configuration of SRAM-based FPGAs |
| Compatible Bitstream Width | — | Serial |