EPC2LI20N vs EPC2L20U Vergleich
Detaillierter Direktvergleich von EPC2LI20N von Altera und EPC2L20U von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2LI20N | EPC2L20U |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,10 | $10,55 |
| Speichertyp | Non-volatile configuration PROM (Flash) | — |
| Speichergröße | 1.6 Mbit | 1.6 Mbit |
| Programmable Type | In System Programmable (ISP via JTAG) | — |
| Configuration Mode | Serial | Single + Cascade (multi-PROM daisy chain) |
| Maximum Configuration Frequency | 10 MHz | — |
| Supply Voltage (VCCINT) | 3.0 V to 3.6 V | — |
| Supply Voltage (VCCIO) | 4.5 V to 5.5 V | — |
| Gehäuse / Bauform | 20-PLCC (J-Lead), 9x9 mm | — |
| Montageart | Surface Mount | Surface Mount / Socket |
| Packaging | Tube | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -40C to +85C (industrial) |
| Supported FPGA Series | ACEX 1K, APEX II, Cyclone, Stratix II | — |
| JTAG Interface | IEEE 1149.1 boundary scan (TCK/TDI/TMS/TDO) | — |
| Configuration Pins | nCS, DCLK, DATA, nCONFIG, nSTATUS, CONF_DONE | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS status] |
| Supply Voltage (VCC) | — | 3.0 V to 3.6 V |
| Schnittstellentyp | — | Serial configuration (DCLK/DATA0) |
| Programmability | — | In-system programmable via IEEE 1532 / JTAG |
| Supported FPGAs | — | APEX II, APEX 20K, Mercury, Stratix, Cyclone, ACEX 1K |
| Compression Support | — | Yes (FPGA decompresses bitstream) |
| Gehäuse | — | 20-PLCC (PLCC-20) |
| JTAG Support | — | Yes (IEEE Std 1149.1 boundary scan) |
| Pin-Anzahl | — | 20 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| MSL-Level | — | [DATA_NEEDED: MSL level] |