EPC2T32U-CAF48 vs EPC2TC32HAF48 Vergleich

Detaillierter Direktvergleich von EPC2T32U-CAF48 von Altera und EPC2TC32HAF48 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Altera
EPC2T32U-CAF48 EPC2T32U-CAF48 - Altera/Intel 2Mb Config Device, 8MHz, 48-QFN | XAIPART

EPC2T32U-CAF48 - Altera/Intel 2Mb Config Device, 8MHz, 48-QFN | XAIPART

EPC2T32U-CAF48 ⚠ Letzte Bestellmöglichkeit

Spezifikationsvergleich

Parameter EPC2T32U-CAF48 EPC2TC32HAF48
Marke Altera Intel
Kategorie Memory ICs Memory ICs
Lebenszyklusstatus Letzte Kaufgelegenheit NRND
Lagerstatus In Stock In Stock
Stückpreis (USD) $17,60 $15,20
Speichertyp Non-volatile flash configuration memory —
Memory Density 2 Mb (2097152 bits) —
Configuration Interface Altera FPP (8-bit) / PS (4-wire) / AS (serial) Altera EPC serial (DATA, DCLK, nCONFIG, nSTATUS, nCASC)
Maximum Configuration Clock (DCLK) 8 MHz —
Supply Voltage (VCC) 3.3 V (typical) 3.3 V (typical)
I/O Tolerance 5 V tolerant —
Program/Erase Endurance 10,000 cycles per sector minimum —
Data Retention 20 years minimum —
Programming Interface IEEE 1149.1 (JTAG) / IEEE 1532 —
Gehäuse 48-pin QFN (CAF suffix) TQFP-48 (7x7x1.0 mm)
Montageart Surface Mount Surface Mount
Betriebstemperatur -40 C to +85 C (industrial grade, "U") [DATA_NEEDED: operating temperature grade]
MSL-Level [DATA_NEEDED: MSL level] [DATA_NEEDED: MSL rating]
Lead-Free Finish Yes (CAF suffix indicates lead-free) —
RoHS-Status Compliant —
Supported FPGA Families Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur —
Speichergröße — 32 Mbit (4 Mbyte)
Funktion — FPGA Configuration PROM for SRAM-based LUT devices
In-System Programmability — Yes, via JTAG (IEEE 1149.1)
Cascade Support — Yes, multi-device daisy-chain via nCASC
FPGA Compatibility — Altera/Intel Cyclone, Stratix, APEX, ACEX families
Lead-Free / RoHS — [DATA_NEEDED: lead-free / RoHS status]
Programming Cycles — [DATA_NEEDED: program/erase endurance]
Configuration Clock (DCLK) — [DATA_NEEDED: maximum DCLK frequency]
Configuration Time (typical) — [DATA_NEEDED: configuration time]

Datenblätter & Ressourcen

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