EPC2TC32-U-CAF48 vs EPC2T32U-CAF48 Vergleich
Detaillierter Direktvergleich von EPC2TC32-U-CAF48 von Altera und EPC2T32U-CAF48 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPC2T32U-CAF48 - Altera/Intel 2Mb Config Device, 8MHz, 48-QFN | XAIPART
EPC2T32U-CAF48 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC2TC32-U-CAF48 | EPC2T32U-CAF48 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $17,60 |
| Speichergröße | 1.6 Mb | — |
| Funktion | In-system programmable configuration PROM | — |
| Versorgungsspannung | 3.3 V | — |
| Schnittstelle | Serial synchronous (Altera FPGA configuration) | — |
| Programming Interface | IEEE 1149.1 JTAG | IEEE 1149.1 (JTAG) / IEEE 1532 |
| Control Pins | OE, nCS, DCLK | — |
| Cascadable | Yes (DATA output supports daisy-chain) | — |
| Storage Technology | EPROM | — |
| Gehäuse | 32-TQFP (7x7 mm) | 48-pin QFN (CAF suffix) |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40C to +85C (industrial, per data sheet) | -40 C to +85 C (industrial grade, "U") |
| Pin-Anzahl | 32 | — |
| DC Input Min | -0.3 V | — |
| DC Input Overshoot | 7.0 V for <100 mA, <20 ns | — |
| DC Input Undershoot | -2.0 V for <100 mA, <20 ns | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Speichertyp | — | Non-volatile flash configuration memory |
| Memory Density | — | 2 Mb (2097152 bits) |
| Configuration Interface | — | Altera FPP (8-bit) / PS (4-wire) / AS (serial) |
| Maximum Configuration Clock (DCLK) | — | 8 MHz |
| Supply Voltage (VCC) | — | 3.3 V (typical) |
| I/O Tolerance | — | 5 V tolerant |
| Program/Erase Endurance | — | 10,000 cycles per sector minimum |
| Data Retention | — | 20 years minimum |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Lead-Free Finish | — | Yes (CAF suffix indicates lead-free) |
| Supported FPGA Families | — | Cyclone, Cyclone II, Stratix, APEX 20K, ACEX 1K, Mercury, Excalibur |