EPC2TC32N vs EPC2T132U Vergleich
Detaillierter Direktvergleich von EPC2TC32N von Altera und EPC2T132U von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2TC32N | EPC2T132U |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,20 | $0,00 |
| Manufacturer | Altera (now Intel) | Intel (formerly Altera) |
| Speichertyp | Flash Configuration PROM | — |
| Speichergröße | 1.6 Mbit | — |
| Programmable Type | In System Programmable (ISP) | — |
| Schnittstelle | JTAG (IEEE 1149.1) + serial/parallel | Serial (Passive Serial), JTAG (IEEE 1149.1), Passive Parallel |
| Supply Voltage - VCCINT | 3.0 V to 3.6 V or 4.75 V to 5.25 V | — |
| Supply Voltage - VCCIO | 3.0 V to 3.6 V or 4.75 V to 5.25 V | — |
| Max Configuration Clock | 8 MHz | — |
| Gehäuse | 32-TQFP (7x7 mm) | 132-pin UQFP (Ultra-thin Quad Flat Pack) |
| Betriebstemperatur | 0 °C to +70 °C (Commercial) | [DATA_NEEDED: operating temperature range] |
| Supported FPGA Families | ACEX 1K, APEX 20K, APEX II, Arria GX, Cyclone, Cyclone II, FLEX 10K, FLEX 6000, Mercury, Stratix, Stratix GX, Stratix II, Stratix II GX | — |
| Daisy-Chain Support | Yes (multi-FPGA cascade) | — |
| JTAG Compliance | IEEE 1149.1 | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Configuration Mode | Serial (AS) or Parallel (PS/AP) | — |
| Product Type | — | FPGA Configuration Device (Boot PROM) |
| Target FPGAs | — | Altera APEX II, Cyclone, Stratix, and other SRAM-based LUT FPGAs |
| Configuration Memory Size | — | [DATA_NEEDED: configuration memory size in bits] |
| Versorgungsspannung | — | 3.3 V |
| In-System Programmability | — | Yes (via JTAG) |
| JTAG Support | — | Yes (IEEE 1149.1 compliant TAP) |
| Configuration Clock | — | Internal oscillator (no external crystal required) |
| Data Compression | — | Yes (up to 2x compression vs competing PROMs) |
| MSL-Level | — | [DATA_NEEDED: MSL level] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |
| Lebenszyklusstatus | — | Obsolete (per Altera/Intel product discontinuance) |
| Compatible Quartus Version | — | [DATA_NEEDED: Quartus version supporting EPC2] |