EPC2TI32 vs EPC2-TI32N Vergleich
Detaillierter Direktvergleich von EPC2TI32 von Altera und EPC2-TI32N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC2TI32 | EPC2-TI32N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,40 | $11,50 |
| Memory Density | 1.6 Mbit | — |
| Speichertyp | Flash (in-system programmable) | — |
| Configuration Interface | Serial (Altera FPGA configuration protocol) | — |
| Configuration Clock Frequency | 10 MHz | — |
| JTAG Interface | IEEE 1149.1 boundary-scan (ISP + JTAG) | — |
| Versorgungsspannung | 3.0 V to 5.5 V | — |
| Gehäuse | 32-pin TQFP (7x7 mm) | — |
| Montageart | Surface Mount | Surface Mount |
| Betriebstemperatur | -40C to +85C | -40 C to +85 C |
| Compatible FPGA Families | APEX II, APEX 20K, Mercury, FLEX 10K, ACEX 1K, Cyclone | — |
| Cascading Support | Yes (multiple devices for larger bitstreams) | — |
| Data Compression | Altera compressed bitstream compatible | — |
| Program/Erase Cycles | [DATA_NEEDED: endurance cycles] | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS compliance status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free status] |
| Speichergröße | — | 1.6 Mb |
| Memory Organization | — | 1,695,680 x 1 |
| Programmable Type | — | In System Programmable |
| Schnittstellentyp | — | Serial (for SRAM-based LUT FPGAs) |
| Programming Interface | — | IEEE 1532-compliant JTAG |
| Supply Voltage - VCCINT | — | 3.0 V to 3.6 V |
| Supply Voltage - VCCIO | — | 4.5 V to 5.5 V |
| Gehäuse / Bauform | — | 32-TQFP (7 mm x 7 mm) |
| Terminal Pitch | — | 0.8 mm |
| Supplier Device Package | — | 32-TQFP |
| Packaging | — | Tray |
| Technology | — | Flash + CMOS configuration logic |
| Configuration Clock | — | Dedicated DCLK output for FPGA |