EPC448JC-30A vs EPC448PC-20 Vergleich
Detaillierter Direktvergleich von EPC448JC-30A von Altera und EPC448PC-20 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC448JC-30A | EPC448PC-20 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | Memory ICs |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,10 | $10,25 |
| Memory Density | 4 Mbit | 4 Mbit (4,194,304 bits) |
| Device Family | Enhanced Configuration Device | Enhanced Configuration Device (EPC) |
| Supply Voltage (VCC) | 3.3 V nominal | 3.3 V |
| Operating Voltage Range | 3.0 V to 3.6 V | — |
| Access Time | 30 ns | — |
| Configuration Interface | Altera serial (DCLK + DATA0) and JTAG ISP | — |
| Package Type | PLCC-32 (JC) | — |
| Pin-Anzahl | 32 | — |
| Montageart | Surface Mount / Socket | Surface Mount |
| Betriebstemperatur | 0 C to +70 C | [DATA_NEEDED: operating temperature range] |
| Programmability | IEEE 1532 JTAG In-System Programmable | — |
| Compatibility | FLEX, APEX, ACEX, Cyclone, Stratix FPGAs | — |
| Lead-Free / RoHS | [DATA_NEEDED: lead-free / RoHS status] | — |
| AEC-Q100 Qualification | Not Qualified | — |
| Configuration Control Pins | nSTATUS, nCONFIG, CONF_DONE | — |
| Speed Grade | — | -20 |
| Configuration Clock (Max) | — | 20 MHz |
| Interface to FPGA | — | Dedicated Altera/Intel configuration serial (Active Serial) |
| Programming Interface | — | JTAG (IEEE 1149.1) ISP |
| Gehäuse | — | 20-ball PC-BGA |
| Configuration Time (typical 4 Mbit) | — | Approx. 200 ms at 20 MHz |
| Supported FPGA Series | — | APEX 20K, ACEX 1K, Cyclone, Cyclone II/III, Stratix/Stratix II |
| Compression | — | Supported (1.5x to 2x depending on bitstream) |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |