EPC448PC-20 vs EPC448PC-45A Vergleich
Detaillierter Direktvergleich von EPC448PC-20 von Altera und EPC448PC-45A von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPC448PC-45A - Altera Enhanced Configuration Device | PDIP
EPC448PC-45A ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC448PC-20 | EPC448PC-45A |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | Memory ICs | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $10,25 | $7,10 |
| Device Family | Enhanced Configuration Device (EPC) | — |
| Memory Density | 4 Mbit (4,194,304 bits) | 4 Mbit (448 Kbit) |
| Speed Grade | -20 | -45A |
| Supply Voltage (VCC) | 3.3 V | 3.0 V to 3.6 V (3.3 V typical) |
| Configuration Clock (Max) | 20 MHz | — |
| Interface to FPGA | Dedicated Altera/Intel configuration serial (Active Serial) | — |
| Programming Interface | JTAG (IEEE 1149.1) ISP | — |
| Gehäuse | 20-ball PC-BGA | — |
| Montageart | Surface Mount | Through-hole (DIP) |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | -40 C to +85 C (industrial) |
| Configuration Time (typical 4 Mbit) | Approx. 200 ms at 20 MHz | — |
| Supported FPGA Series | APEX 20K, ACEX 1K, Cyclone, Cyclone II/III, Stratix/Stratix II | — |
| Compression | Supported (1.5x to 2x depending on bitstream) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status from official datasheet] |
| Lead-Free | [DATA_NEEDED: lead-free status] | [DATA_NEEDED: lead-free finish status] |
| Device Type | — | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs |
| Maximum Access Time | — | 45 ns |
| Package Type | — | Plastic DIP (PDIP-20), 300-mil body |
| Pin-Anzahl | — | 20 |
| I/O Voltage Compatibility | — | 1.8 V, 2.5 V, 3.3 V downstream FPGA |
| Configuration Interface | — | Altera Passive Serial (4-wire: nCS, DCLK, DATA, nINIT_CONF) |
| Programming Technology | — | EEPROM cell with internal charge pump |
| Configuration Support | — | Altera Cyclone, Stratix, APEX, ACEX, Mercury, Excalibur FPGAs |
| MSL-Level | — | Not applicable (through-hole package) |