EPC4QC100N vs EPC4QC100 Vergleich
Detaillierter Direktvergleich von EPC4QC100N von Intel und EPC4QC100 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC4QC100N | EPC4QC100 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | Memory ICs | Memory ICs |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $8,10 | $11,40 |
| Speichertyp | Flash (NOR, configuration PROM) | Flash |
| Speichergröße | 4 Mbit (4,194,304 bits) | 4 Mb |
| Programmable Type | In System Programmable (ISP) | — |
| Configuration Interface | Serial / Parallel / JTAG (IEEE 1149.1) | — |
| Maximum DCLK Frequency | 66.7 MHz | — |
| On-Chip Decompression | Yes | — |
| Supply Voltage (VCC) | 3.0 V to 3.6 V | — |
| Typical Supply Voltage | 3.3 V | — |
| Betriebstemperatur | 0 C to 70 C (commercial) | 0C to +70C (commercial) |
| Gehäuse | 100-pin PQFP (Plastic Quad Flat Pack) | 100-pin PQFP (20x14 mm) |
| Package Dimensions | 20 x 14 mm | — |
| Pin Pitch | 0.65 mm | — |
| Montageart | Surface Mount | Surface Mount |
| Packaging | Tray | — |
| Lead Free / RoHS | Yes (per chipdig datasheet excerpt) | — |
| Family | EPC4 Enhanced Configuration Device | — |
| JTAG Support | Yes (IEEE 1149.1 boundary-scan) | Yes (boundary scan + ISP via Jam STAPL) |
| Funktion | — | In-System Programmable Configuration PROM for FPGAs |
| Supply Voltage (Core and I/O) | — | 3.3 V |
| Maximum Configuration Clock | — | 66 MHz |
| Schnittstelle | — | Serial / Fast Passive (Altera FPGAs) |
| In-System Programmability | — | IEEE Std. 1532 compliant |
| nINIT_CONF Pin | — | Yes (triggers FPGA configuration via private JTAG instruction) |
| RoHS-Status | — | unknown |
| Lead-Free | — | unknown |
| Compatible FPGA Families | — | Stratix, Cyclone, APEX, Mercury, ACEX |