EPC4QC100T vs EPC4QC1C00N Vergleich

Detaillierter Direktvergleich von EPC4QC100T von Altera und EPC4QC1C00N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.

Spezifikationsvergleich

Parameter EPC4QC100T EPC4QC1C00N
Marke Altera Altera
Kategorie Memory ICs FPGA & CPLD
Lebenszyklusstatus NRND Obsolete
Lagerstatus In Stock In Stock
Stückpreis (USD) $10,25 $9,10
Speichertyp Flash configuration PROM (non-volatile) —
Memory Density 4 Mbit 4 Mbit (4,194,304 bits)
Configuration Interface Serial / x8 Parallel (selectable) —
Maximum Serial Clock Frequency 66 MHz —
Supported FPGAs Altera/Intel Cyclone, Stratix, APEX families —
Supply Voltage (VCC) 3.0 V to 3.6 V (3.3 V typ) 3.0 V to 3.6 V (3.3 V typical)
I/O Voltage (VCCIO / MultiVolt) 1.8 V / 2.5 V / 3.3 V / 5.0 V —
In-System Programming IEEE 1149.1 JTAG + serial interface JTAG (IEEE 1149.1)
JTAG Support Yes (1149.1 boundary-scan compliant) —
Configuration Modes Serial (1-bit) and Parallel (x8) —
Daisy-Chain Support Yes (EPC4-to-EPC4 only) —
Gehäuse 100-pin PQFP (Plastic Quad Flat Pack), 20 x 14 mm 100-pin PQFP (QFP-100)
Betriebstemperatur -40 C to +85 C (industrial) -40 C to +85 C (industrial)
Montageart Surface Mount —
Lead-Free / RoHS Lead-free; RoHS compliance depends on date code —
MSL-Level 3 (per JEDEC J-STD-020) 3 (per JEDEC J-STD-020)
Device Family — Enhanced Configuration Device (EPC4)
I/O Voltage Tolerance — 3.3 V / 5 V tolerant
Interface to FPGA — Serial DATA, DCLK, nCONFIG, nSTATUS, CONF_DONE
Configuration Data Width — 4-bit multiplexed on single DATA pin
Programming Voltage — On-chip generated, no external VPP
Page Mode — Yes, multi-page storage supported
Target FPGA Families — Stratix, Cyclone, APEX, Mercury, ACEX
Configuration Clock (DCLK) — [DATA_NEEDED: DCLK max frequency]
RoHS-Status — [DATA_NEEDED: RoHS compliance status]
Lead-Free — [DATA_NEEDED: lead-free status]

Datenblätter & Ressourcen

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