EPC8820ARI208-4 vs EPC8820ARC208-3N Vergleich
Detaillierter Direktvergleich von EPC8820ARI208-4 von Altera und EPC8820ARC208-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPC8820ARI208-4 | EPC8820ARC208-3N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,00 | $21,25 |
| Device Type | Enhanced Configuration Device (EPC) for SRAM-based LUT FPGAs | SRAM-based Programmable Logic Device (PLD) |
| Manufacturer | Altera (acquired by Intel in 2015) | — |
| Gehäuse | 208-pin quad flat pack, RQFP (per ARI208 ordering field) | 208-pin RQFP (Plastic Quad Flat Pack) |
| Pin-Anzahl | 208 pins | — |
| Montageart | Surface mount | Surface Mount |
| Temperature Grade | Industrial (I designator in ARI208) | — |
| Speed Grade | -4 (Altera configuration speed grade) | — |
| Configuration Target | SRAM-based LUT FPGAs | — |
| Configuration Memory | Non-volatile configuration memory (EPC family characteristic) | — |
| In-System Programmability | Supported per EPC family documentation | — |
| Configuration Density | [DATA_NEEDED: configuration density in bits] | — |
| Versorgungsspannung | [DATA_NEEDED: supply voltage range] | — |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature range] | — |
| Configuration Interface | [DATA_NEEDED: configuration interface and control pin list] | — |
| Configuration Clock Source | [DATA_NEEDED: configuration clock source and maximum frequency] | — |
| Standby Current | [DATA_NEEDED: standby and active supply current] | — |
| Programming Endurance | [DATA_NEEDED: programming endurance cycles] | — |
| Data Retention | [DATA_NEEDED: configuration data retention] | — |
| MSL Rating | [DATA_NEEDED: moisture sensitivity level] | — |
| Package Body Dimensions | [DATA_NEEDED: package body size and lead pitch] | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | unknown |
| Lead Finish | [DATA_NEEDED: lead finish / lead-free (-N) suffix confirmation] | — |
| Family | — | FLEX 8000 |
| Usable Gates | — | 8,000 |
| Logic Cells / Logic Elements (LEs) | — | 672 |
| Maximum User I/O | — | 152 |
| Maximum Operating Frequency | — | 125 MHz |
| Propagation Delay (tpd) | — | 5.0 ns |
| Process Technology | — | 0.42 µm CMOS |
| Core Supply Voltage (VCCINT) | — | 5.0 V nominal (4.75 V to 5.25 V) |
| I/O Supply Voltage (VCCIO) | — | 3.3 V or 5 V (programmable I/O standard) |
| Operating Temperature Grade | — | Industrial (N suffix) |
| Configuration Method | — | SRAM, loaded via external EPROM or Altera serial configuration device (EPC1 / EPC1064 / EPC1213 / EPC1441) |
| Lead-Free | — | unknown |
| Configuration Device Compatibility | — | EPC1, EPC1064, EPC1213, EPC1441 (per manufacturer datasheet) |