EPC8Q100C vs EPC8Q100 Vergleich
Detaillierter Direktvergleich von EPC8Q100C von Altera und EPC8Q100 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPC8Q100C - 8Mb Enhanced Configuration Device | Altera/Intel
EPC8Q100C ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPC8Q100C | EPC8Q100 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,65 | $10,85 |
| Memory Density | 8 Mbit | 8 Mbit (8,388,608 bits) |
| Device Family | Enhanced Configuration Device (EPC8Q100 series) | — |
| Configuration Interface | Serial / Parallel (x8) slave mode | Altera EPC serial (DATA, DCLK, nCS, nINIT_CONF, nSTATUS, DONE) |
| Versorgungsspannung | 3.3 V (typ) | — |
| In-System Programming | IEEE 1149.1 JTAG | — |
| Gehäuse | 100-pin PQFP (20 x 14 mm) | 100-pin PQFP (20 x 14 mm) |
| Betriebstemperatur | 0 C to +70 C (commercial, 'C' suffix) | — |
| Cascade Support | Up to 4 devices cascadable | — |
| Supported FPGA Families | Altera Cyclone, Cyclone II, Stratix, Stratix GX, Apex series | — |
| Configuration Clock | User-programmable internal oscillator | — |
| Programming Cycles | 100 minimum endurance cycles | — |
| Programming Voltage | 3.3 V in-system (no external VPP) | — |
| Lead-Free / RoHS | Lead-free per Altera/Intel Pb-free roadmap | [DATA_NEEDED: status] |
| Montageart | Surface Mount (PQFP) | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL rating] | [DATA_NEEDED: level] |
| Speichertyp | — | NOR Flash, One-Time-Programmable (OTP) via JTAG |
| Supply Voltage VCC | — | 5.0 V (3.3 V core generated on-chip) |
| Internal Core Voltage | — | 3.3 V (on-chip LDO) |
| Maximum EPC Clock | — | 33 MHz |
| Programmability | — | In-system via IEEE 1149.1 JTAG |
| FPGA Compatibility | — | APEX 20K, APEX II, Cyclone, Cyclone II, Stratix, Stratix GX |
| Configuration Mode Support | — | FPP, PS, AS, JTAG (FPGA-dependent) |
| Program/Erase Endurance | — | [DATA_NEEDED: cycle count] |
| Data Retention | — | [DATA_NEEDED: minimum years] |
| Betriebstemperaturbereich | — | 0 C to +70 C (commercial) |
| Storage Temperature Range | — | [DATA_NEEDED: range] |