EPF10K100BQC240-2 vs EPF10K100BFC256-1 Vergleich
Detaillierter Direktvergleich von EPF10K100BQC240-2 von Altera und EPF10K100BFC256-1 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF10K100BQC240-2 - 100K Gate FLEX-10KE FPGA, 240-PQFP | Altera
EPF10K100BQC240-2 ⚠ Letzte BestellmöglichkeitAltera
EPF10K100BFC256-1 - FLEX-10K 100K-Gate FPGA | Intel/Altera | 256-BGA
EPF10K100BFC256-1 ObsoleteSpezifikationsvergleich
| Parameter | EPF10K100BQC240-2 | EPF10K100BFC256-1 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $115,00 | $105,00 |
| Series | FLEX-10KE | FLEX-10K® |
| Family | FLEX-10K (embedded PLD) | FLEX-10K (100K gates) |
| Logic Elements / Cells | 4,992 | — |
| Total System Gates | 100,000 (typical) | — |
| Total RAM Bits | 24,576 | 6144 |
| Number of I/O | [DATA_NEEDED: I/O count per datasheet table] | 244 (approx.) |
| Versorgungsspannung | 4.75 V to 5.25 V | 4.75 V to 5.25 V |
| Betriebstemperatur | [DATA_NEEDED: commercial 0C to 70C, industrial -40C to 85C per speed grade] | 0°C to +70°C (commercial) |
| Process Technology | 0.22 µm CMOS | 0.42 µm SRAM-based CMOS |
| Speed Grade | -2 (mid-range, ~250 MHz internal) | -1 (fastest) |
| Gehäuse / Bauform | 240-BFQFP / 240-PQFP (32x32 mm) | — |
| Supplier Device Package | 240-PQFP (32x32) | 256-FBGA |
| Montageart | Surface Mount | Surface Mount |
| Configuration Interface | Serial / JTAG (IEEE 1149.1) | — |
| RoHS-Status | [DATA_NEEDED: legacy part, may be non-RoHS] | — |
| MSL-Level | [DATA_NEEDED: per package qualification] | — |
| Number of Logic Elements | — | 576 |
| Number of Gates | — | 100,000 typical system gates |
| Gehäuse | — | 256-FBGA (17 mm x 17 mm) |
| Form of Terminal | — | Ball |
| Number of Terminals | — | 256 |
| JTAG Support | — | IEEE Std 1149.1 boundary-scan |
| Configuration Mode | — | In-system programmable (ByteBlaster/BitBlaster) |