EPF10K100BQC240-2 vs EPF10K100EQC240-1X Vergleich
Detaillierter Direktvergleich von EPF10K100BQC240-2 von Altera und EPF10K100EQC240-1X von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF10K100BQC240-2 - 100K Gate FLEX-10KE FPGA, 240-PQFP | Altera
EPF10K100BQC240-2 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPF10K100BQC240-2 | EPF10K100EQC240-1X |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $115,00 | $65,00 |
| Series | FLEX-10KE | FLEX 10KE |
| Family | FLEX-10K (embedded PLD) | FLEX 10KE Field Programmable Gate Array |
| Logic Elements / Cells | 4,992 | — |
| Total System Gates | 100,000 (typical) | — |
| Total RAM Bits | 24,576 | 49,152 |
| Number of I/O | [DATA_NEEDED: I/O count per datasheet table] | — |
| Versorgungsspannung | 4.75 V to 5.25 V | — |
| Betriebstemperatur | [DATA_NEEDED: commercial 0C to 70C, industrial -40C to 85C per speed grade] | — |
| Process Technology | 0.22 µm CMOS | 0.22 um CMOS |
| Speed Grade | -2 (mid-range, ~250 MHz internal) | — |
| Gehäuse / Bauform | 240-BFQFP / 240-PQFP (32x32 mm) | — |
| Supplier Device Package | 240-PQFP (32x32) | — |
| Montageart | Surface Mount | Surface Mount, gull-wing leads |
| Configuration Interface | Serial / JTAG (IEEE 1149.1) | — |
| RoHS-Status | [DATA_NEEDED: legacy part, may be non-RoHS] | [DATA_NEEDED: rohs status] |
| MSL-Level | [DATA_NEEDED: per package qualification] | — |
| System Gates | — | 100,000 |
| Logic Cells | — | 4,992 |
| Logic Array Blocks (LABs) | — | 624 |
| User I/Os | — | 189 |
| Core Voltage | — | 2.375 V to 2.625 V (typ. 2.5 V) |
| Maximum Internal Clock Frequency | — | 333.33 MHz |
| Gehäuse | — | 240-BFQFP / PQFP, 32 x 32 mm |
| Packaging | — | Tray |
| Feuchtigkeitsempfindlichkeitsgrad (MSL) | — | 3 (168 Hours) |
| Peak Reflow Temperature (Max) | — | 30 s [DATA_NEEDED: peak temperature deg C] |
| JTAG Compliance | — | IEEE Std. 1149.1-1990 BST |
| PCI Compliance | — | PCI Local Bus Specification Revision 2.2 (3.3 V and 5.0 V operation, -1 speed grade) |