EPF10K100EFC484-1N vs EPF10K100EFC484-3 Vergleich
Detaillierter Direktvergleich von EPF10K100EFC484-1N von Intel und EPF10K100EFC484-3 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPF10K100EFC484-1N - 100K FLEX 10KE FPGA, 338 I/O, 484-BGA | Intel
EPF10K100EFC484-1N ObsoleteSpezifikationsvergleich
| Parameter | EPF10K100EFC484-1N | EPF10K100EFC484-3 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $158,00 | $65,00 |
| Manufacturer | Intel (formerly Altera) | — |
| Series | FLEX 10KE | — |
| Device Type | Field Programmable Gate Array (FPGA) | — |
| Logic Elements / Cells | 4,992 | — |
| Equivalent Gates | 100,000 | — |
| Embedded Memory Bits | 49,152 bits | — |
| Number of LABs | 624 | — |
| Number of Logic Elements | 4,992 | — |
| User I/Os | 338 | — |
| Anzahl der Pins | 356 (BGA-356 per one source) / 484 (BGA-484 per other sources) | — |
| Gehäuse | 484-BBGA (FineLine BGA) | 484-ball FineLine BGA |
| Montageart | Surface Mount | — |
| Logic Family | CMOS | — |
| Process Technology | 0.22 µm CMOS SRAM | — |
| Core Supply Voltage | 2.5 V | — |
| I/O Supply Voltage | 3.3 V (5 V-tolerant inputs via VCCIO) | — |
| Propagation Delay (worst case) | 0.6 ns | — |
| Betriebstemperatur | 0 °C to 70 °C (commercial) | 0C to +70C (Commercial) |
| Configuration | SRAM-based, in-system reprogrammable | — |
| JTAG / IEEE 1149.1 | Yes | — |
| RoHS-Status | compliant (lead-free FBGA) | [DATA_NEEDED: RoHS status] |
| Lebenszyklusstatus | Obsolete (NRND per Intel/Altera PCN history) | — |
| Family | — | FLEX 10KE |
| Typical Gates | — | 100,000 |
| Maximum System Gates | — | 158,000 |
| Logic Elements | — | 4,992 |
| Logic Array Blocks (LABs) | — | 624 |
| Embedded Memory (EAB RAM) | — | 49,152 bits |
| User I/O Pins | — | 338 |
| Speed Grade | — | -3 (fastest commercial) |
| Core Voltage | — | 2.5 V |
| I/O Standards Supported | — | 2.5V / 3.3V / 5.0V (PCI-compliant) |
| JTAG Support | — | IEEE Std. 1149.1-1990 BST |
| Configuration Method | — | SRAM (volatile, requires configuration device) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |