EPF10K100EFC484-3 vs EPF10K50EFC484-2 Vergleich
Detaillierter Direktvergleich von EPF10K100EFC484-3 von Altera und EPF10K50EFC484-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF10K50EFC484-2 - 50K Gates FLEX-10KE FPGA, 484-BGA | Intel / Altera
EPF10K50EFC484-2 ObsoleteSpezifikationsvergleich
| Parameter | EPF10K100EFC484-3 | EPF10K50EFC484-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $65,00 | $52,75 |
| Family | FLEX 10KE | FLEX-10KE |
| Typical Gates | 100,000 | 50,000 |
| Maximum System Gates | 158,000 | — |
| Logic Elements | 4,992 | — |
| Logic Array Blocks (LABs) | 624 | — |
| Embedded Memory (EAB RAM) | 49,152 bits | — |
| User I/O Pins | 338 | — |
| Speed Grade | -3 (fastest commercial) | -2 |
| Gehäuse | 484-ball FineLine BGA | 484-ball FineLine BGA (FBGA) |
| Betriebstemperatur | 0C to +70C (Commercial) | 0 C to +70 C (Commercial) |
| Core Voltage | 2.5 V | 2.5 V |
| I/O Standards Supported | 2.5V / 3.3V / 5.0V (PCI-compliant) | — |
| JTAG Support | IEEE Std. 1149.1-1990 BST | — |
| Configuration Method | SRAM (volatile, requires configuration device) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | — |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements (LEs) | — | 2,880 |
| Embedded Memory (Bits) | — | 40,960 |
| Embedded Array Blocks (EABs) | — | 12 (each 2,048 bits) |
| Maximum User I/O Pins | — | 220 |
| Process Technology | — | 0.22 micrometer CMOS |
| Internal Frequency | — | 200 MHz |
| JTAG Boundary-Scan | — | IEEE Std. 1149.1-1990 compliant |
| PCI Compliance | — | PCI Local Bus Specification Rev. 2.2 at 33/66 MHz (3.3 V); 5.0 V at speed grade -1 |
| Montageart | — | Surface Mount (BGA) |