EPF10K130EFC672-2 vs EPF10K200SFC672-2 Vergleich
Detaillierter Direktvergleich von EPF10K130EFC672-2 von Altera und EPF10K200SFC672-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF10K130EFC672-2 | EPF10K200SFC672-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $61,75 | $320,00 |
| Family | FLEX 10KE | — |
| Logic Elements / Cells | 6,656 | — |
| Total Gates | ~130,000 | — |
| Logic Array Blocks (LABs) | 832 | 1,248 |
| Embedded Memory (RAM bits) | 65,536 | — |
| Maximum User I/Os | 413 | — |
| Number of I/O Pins | 672 (package pins) | — |
| Gehäuse | 672-ball FineLine BGA | 672-pin FineLine BGA (FBGA), 45 × 45 mm, 1.27 mm pitch |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS |
| Core Supply Voltage | 2.5 V | 2.5 V (2.375 V to 2.625 V) |
| Propagation Delay (typ.) | 0.6 ns | — |
| Internal Operating Frequency (max) | 333.33 MHz | — |
| Betriebstemperatur | 0 °C to +70 °C (Commercial) | 0 °C to +70 °C (Commercial) |
| Speed Grade | -2 | -2 |
| Programming Method | SRAM-based, JTAG (IEEE 1149.1) | — |
| Montageart | Surface Mount (BGA) | — |
| Series | — | FLEX 10KE |
| Logic Elements | — | 9,984 |
| System Gates | — | 200,000 |
| User I/O Pins | — | 470 |
| Embedded Memory (bits) | — | 98,304 |
| I/O Supply Voltage | — | MultiVolt 2.5 V / 3.3 V / 5.0 V |
| Internal Propagation Delay | — | 0.4 ns |
| Maximum Operating Frequency | — | 200 MHz |
| Configuration Method | — | SRAM-based, passive parallel asynchronous |
| Boundary Scan | — | IEEE 1149.1 (JTAG) |
| On-chip PLL | — | Yes |
| RoHS-Status | — | [DATA_NEEDED: RoHS compliance status] |