EPF10K200SFC484-2N vs EPF10K200SFC484-2 Vergleich
Detaillierter Direktvergleich von EPF10K200SFC484-2N von Intel und EPF10K200SFC484-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF10K200SFC484-2N | EPF10K200SFC484-2 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $95,00 | $88,40 |
| Family | FLEX 10KE | FLEX 10K (FLEX-10KS subfamily) |
| Logic Elements / Cells | 9,984 | 9,984 |
| Gate Count | 200,000 | — |
| Logic Array Blocks (LABs) | 1,248 | — |
| Embedded RAM Bits | 98,304 (96 Kbit) | — |
| User I/O Pins | 369 | — |
| Number of I/Os (alt spec) | 470 (per digchip datasheet summary) | — |
| Core Supply Voltage | 2.375 V to 2.625 V (2.5 V nominal) | 2.5 V (2.375 V to 2.625 V) |
| Internal Performance | 200 MHz | — |
| Propagation Delay | 0.4 ns | 0.4 ns (max) |
| Process Technology | 0.22 µm CMOS | — |
| Betriebstemperatur | 0°C to 70°C (Commercial) | 0 C to +70 C (commercial) |
| Gehäuse | 484-FBGA FineLine BGA, 23 x 23 mm, 1.0 mm pitch | — |
| Montageart | Surface Mount | Surface Mount |
| Programming Interface | JTAG (IEEE 1149.1), SRAM configuration | — |
| I/O Standard Support | 5 V-tolerant, MultiVolt (1.8 V / 2.5 V / 3.3 V) | — |
| Logic Family | CMOS | — |
| Compliance / Lead Status | [DATA_NEEDED: RoHS status] | — |
| Series | — | FLEX 10KS |
| System Gates | — | 200,000 |
| Embedded Memory (RAM bits) | — | 98,304 |
| Embedded Array Blocks (EAB) | — | 4 EABs x 2,048 bits |
| Logic Array Blocks (LAB) | — | 369 |
| User I/Os | — | 369 |
| Anzahl der Pins | — | 484 |
| Package Type | — | FineLine BGA-484 (23 x 23 mm, 1.0 mm pitch) |
| Technology | — | 0.22 um CMOS, SRAM-based |
| I/O Supply Voltage | — | 2.5 V / 3.3 V / 5 V (multiVolt I/O) |
| RoHS-Status | — | Compliant (lead-free) |
| Configuration Method | — | EPC configuration device, JTAG, or microcontroller |
| Speed Grade | — | -2 (faster than -3) |
| PLL Count | — | 4 |