EPF10K250EBC600-3 vs EPF10K250EBC600-2 Vergleich
Detaillierter Direktvergleich von EPF10K250EBC600-3 von Intel und EPF10K250EBC600-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF10K250EBC600-2 - FLEX 10KE FPGA 250K Gates 600-BGA | Altera
EPF10K250EBC600-2 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPF10K250EBC600-3 | EPF10K250EBC600-2 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $205,00 | $392,00 |
| Family | FLEX 10KE | FLEX 10KE |
| Logic Elements | 12,160 LEs | — |
| Typical Gates | 250,000 | 250,000 |
| Maximum User I/O | 470 | — |
| Embedded Array Blocks (EABs) | 12 (each 2 Kbits) | 4096 (2,048 bits each) |
| Total Embedded Memory | 24 Kbits (RAM) | — |
| PLLs (Phase-Locked Loops) | 4 | — |
| Dedicated Clock Inputs | 6 | — |
| Speed Grade | -3 | — |
| Core Supply Voltage | 3.3 V | 3.3 V |
| I/O Supply Voltage | 3.3 V (5 V tolerant) | — |
| Gehäuse | 600-ball FineLine BGA | 600-ball FineLine BGA |
| Configuration Mode | Passive Serial / Passive Parallel / JTAG | PS, PPS, PPA, JTAG |
| Boundary Scan | IEEE 1149.1 (JTAG) | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | — |
| Process Technology | SRAM-based CMOS | SRAM-based, 0.22 um CMOS |
| Usable Gates | — | 152,000 |
| Logic Elements (LEs) | — | 12,288 |
| Flip-Flops | — | 12,288 |
| Logic Array Blocks (LABs) | — | 80 (8 LEs each) |
| Embedded Memory Bits | — | 40,960 bits |
| Maximum User I/O Pins | — | 488 |
| I/O Banks | — | 12 |
| PLLs | — | 4 |
| I/O Standards Supported | — | LVTTL, LVCMOS, PCI, GTL+, SSTL-2, SSTL-3 |
| Operating Temperature Grade | — | Commercial |
| Montageart | — | Surface Mount |