EPF10K50ETC144-3 vs EPF10K50ETI144-2 Vergleich
Detaillierter Direktvergleich von EPF10K50ETC144-3 von Intel und EPF10K50ETI144-2 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPF10K50ETI144-2 - 50K Gates FLEX 10KE FPGA, 144-LQFP | Intel
EPF10K50ETI144-2 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPF10K50ETC144-3 | EPF10K50ETI144-2 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $29,90 | $26,10 |
| Family | FLEX 10KE | FLEX 10KE |
| Typical Gate Count | 50,000 gates | — |
| Logic Elements / Cells | 2,880 | — |
| Total Memory Bits | 40,960 bits | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| User I/O Pins (this package) | 102 | — |
| Max User I/O (family) | 274 pins | — |
| Anzahl der Pins | 144 | — |
| Package Type | TQFP-144 (also referred to as 144-LQFP) | — |
| Propagation Delay | 0.6 ns | — |
| Maximum Internal Frequency | 166.67 MHz | — |
| Internal Frequency (per DigChip summary) | 66.67 MHz | — |
| Process Technology | 0.22 µm CMOS | 0.22 µm CMOS SRAM |
| Core Supply Voltage | 2.5 V | — |
| Logic Family | CMOS | — |
| Betriebstemperatur | 0 °C to +70 °C (Commercial) | -40C to +85C (Industrial) |
| Montageart | Surface Mount | — |
| Configuration Memory | SRAM (volatile) | — |
| JTAG Support | IEEE 1149.1 boundary scan | — |
| RoHS-Status | [DATA_NEEDED: rohs status] | [DATA_NEEDED: RoHS status] |
| Typical Gates | — | 50,000 |
| Maximum System Gates | — | 199,000 |
| Logic Elements (LEs) | — | 2,880 |
| Embedded Array Blocks (EABs) | — | 10 |
| Total RAM Bits | — | 40,960 |
| Maximum User I/O Pins (this package) | — | 102 |
| Maximum User I/O Pins (family) | — | 254 |
| Core Voltage (VCCINT) | — | 2.5 V |
| Gehäuse | — | 144-LQFP (TQFP), 22 x 22 mm, 0.5 mm pitch |
| Configuration Method | — | Serial Passive / JTAG (IEEE 1149.1) |
| Speed Grade | — | -2 (mid) |