EPF10K50VQC240-3 vs EPF10K50SQC240-3N Vergleich
Detaillierter Direktvergleich von EPF10K50VQC240-3 von Intel und EPF10K50SQC240-3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF10K50SQC240-3N - FLEX 10KE 50K Gates FPGA, 240-PQFP | Altera / Intel
EPF10K50SQC240-3N ObsoleteSpezifikationsvergleich
| Parameter | EPF10K50VQC240-3 | EPF10K50SQC240-3N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | NRND | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $21,50 | $60,00 |
| Family | FLEX 10K | FLEX 10KE |
| Series | EPF10K50 | — |
| Typical Gates | 50,000 | 50,000 |
| Logic Elements / Cells | 2,880 | — |
| Logic Array Blocks (LABs) | 360 | 360 |
| User I/Os | 189 | 189 (per DigiKey listing); 274 user I/Os (per Digchip listing) |
| Number of I/O Banks | [DATA_NEEDED: number of I/O banks] | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Process Technology | 0.42 µm CMOS | 0.22 µm CMOS |
| Maximum Internal Frequency | 125 MHz | — |
| Propagation Delay (tpd) | 0.6 ns | 0.6 ns |
| Package Type | 240-pin PQFP (Plastic Quad Flat Pack) | — |
| Package Code | FQFP-240 | — |
| Betriebstemperatur | 0 °C to +70 °C (Commercial) | 0 °C to 70 °C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| Configuration Method | SRAM-based, requires external EPC device or MCU | — |
| Speed Grade | -3 (mid-tier) | -3 (faster Fmax) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Compliant (Pb-free N suffix) |
| Logic Family | — | CMOS |
| System Gates | — | 40,960 |
| Logic Cells / Elements | — | 2,880 |
| Embedded Array Blocks (EABs) | — | 12 |
| On-chip EAB Memory | — | 24 Kbits |
| Number of I/Os (per distributor) | — | 189 (DigiKey / Mouser) |
| Internal Frequency (Fmax) | — | 166.67 MHz |
| Core Supply Voltage (VCCINT) | — | 2.5 V |
| I/O Voltage (VCCIO) | — | MultiVolt: 2.5 V / 3.3 V / 5.0 V tolerant |
| Gehäuse | — | 240-pin PQFP (Power Quad Flat Pack), 34.60 x 34.6 mm, 0.5 mm pitch |
| Lead-Free Finish (N suffix) | — | Yes |
| JTAG Boundary Scan | — | IEEE Std. 1149.1 compliant |
| Programming Technology | — | SRAM-based, in-system reconfigurable via JTAG |
| Design Tool | — | Altera Quartus II (FLEX 10KE support) |