EPF6010ATC100-2 vs EPF6010ATC100-3 Vergleich
Detaillierter Direktvergleich von EPF6010ATC100-2 von Altera und EPF6010ATC100-3 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF6010ATC100-2 - FLEX 6000 FPGA, 880 Gates, 71 I/O | Intel (Altera)
EPF6010ATC100-2 ObsoleteSpezifikationsvergleich
| Parameter | EPF6010ATC100-2 | EPF6010ATC100-3 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $14,20 | $18,90 |
| Series | FLEX 6000 | — |
| Family | SRAM-based FPGA | FLEX 6000 |
| Manufacturer | Intel (formerly Altera) | — |
| Logic Elements / Gates | 880 gates (typical) | — |
| Logic Array Blocks (LABs) | 88 | 88 |
| User I/O Pins | 71 | 71 |
| Number of Logic Cells | 880 (per FLEX 6000 family datasheet) | — |
| Gehäuse | 100-pin TQFP (14x14 mm) | TQFP-100 (100-pin) |
| Speed Grade | -2 | -3 (commercial, slowest grade) |
| Betriebstemperatur | 0C to 70C (commercial) | 0C to +70C (commercial) |
| Core Supply Voltage | 3.0 V to 3.6 V (typical 3.3 V) | — |
| I/O Supply Voltage | 3.3 V (5 V tolerant inputs per FLEX 6000 family) | — |
| Configuration Interface | JTAG (IEEE 1149.1) + serial configuration | — |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: moisture sensitivity level] | [DATA_NEEDED: MSL level] |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Process Node | [DATA_NEEDED: CMOS process node] | — |
| Total RAM Bits | [DATA_NEEDED: embedded RAM] | — |
| Logic Elements / Cells | — | 880 |
| Usable Gates | — | 10,000 |
| Process Technology | — | 0.42 µm CMOS SRAM |
| Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Voltage Tolerance | — | 3.3 V / 5 V tolerant |
| Configuration Memory | — | SRAM (external configuration device required) |
| JTAG Support | — | Yes (IEEE 1149.1) |