EPF6016ATI100-2N vs EPF6010ATI100-2 Vergleich
Detaillierter Direktvergleich von EPF6016ATI100-2N von Altera und EPF6010ATI100-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF6016ATI100-2N - FLEX 6000 FPGA, 16K Gates, 100-TQFP | Altera/Intel
EPF6016ATI100-2N ObsoleteAltera
EPF6010ATI100-2 - FLEX 6000 10K Gates FPGA | Altera | 100-TQFP
EPF6010ATI100-2 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPF6016ATI100-2N | EPF6010ATI100-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $14,20 | $16,20 |
| Family | FLEX 6000 | FLEX 6000 |
| Device Logic Elements | 1,320 LEs | — |
| Typical Gate Count | 16,000 gates | — |
| Logic Array Blocks (LABs) | 132 LABs (10 LEs per LAB) | 88 |
| User I/Os | 81 | — |
| Gehäuse | 100-pin TQFP | 100-pin TQFP (14×14 mm, 0.5 mm pitch) |
| Internal Operating Frequency (max) | 166.67 MHz | — |
| Core Supply Voltage | 3.3 V | — |
| Process Technology | 0.42 um CMOS SRAM | 0.42 µm CMOS |
| Configuration Method | SRAM, JTAG BST, serial/parallel | — |
| I/O Standard Support | 3.3 V LVTTL/LVCMOS, 5.0 V tolerant | — |
| Setup Time | 2 ns (typical) | — |
| Hold Time | 0 ns (typical) | — |
| Betriebstemperatur | 0 C to 85 C (commercial) | -40 °C to +85 °C (industrial) |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS compliance] | [DATA_NEEDED: RoHS status] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Logic Elements | — | 880 |
| Usable Gates | — | 10,000 |
| User I/O Pins | — | 71 |
| Maximum Operating Frequency | — | 166.67 MHz |
| Core Voltage | — | 3.3 V |
| I/O Voltage | — | 3.3 V (5 V tolerant) |
| Configuration Technology | — | SRAM (volatile) |
| Speed Grade | — | -2 |
| Terminal Form | — | Gull Wing |
| Dedicated Inputs per LAB | — | 4 |