EPF6024AQC208-1N vs EPF6024ABC256-2N Vergleich
Detaillierter Direktvergleich von EPF6024AQC208-1N von Intel und EPF6024ABC256-2N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF6024AQC208-1N | EPF6024ABC256-2N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,75 | $22,10 |
| Family | FLEX 6000 | FLEX 6000 |
| Logic Elements / Cells | 1,960 | 1,960 |
| Typical Gates | 24,000 | — |
| Logic Array Blocks (LABs) | 196 | 196 |
| User I/Os | 171 | — |
| Number of I/O Pins | 171 | — |
| Gehäuse | 208-BFQFP (Plastic Quad Flat Pack, PQFP) | 256-ball BGA (BC256) |
| Package Pin Count | 208 | — |
| Montageart | Surface Mount | Surface Mount |
| Versorgungsspannung | 3.3 V | 3.3 V |
| Process Technology | 0.42 µm CMOS | 0.42 µm CMOS |
| Internal Frequency (max) | 200 MHz | 172 MHz |
| Betriebstemperatur | 0 °C to +85 °C (TJ) | 0 °C to 85 °C (commercial) |
| Configuration Memory | SRAM (volatile, re-load required at power-up) | — |
| Speed Grade | -1 (slowest) | — |
| JTAG / Boundary Scan | IEEE 1149.1 compliant | Yes (JTAG BST) |
| Programming Tools | Altera MAX+PLUS II / Quartus | — |
| Part Status | Obsolete | — |
| Gate Count | — | 24,000 gates |
| User I/O Pins | — | 218 |
| I/O Features | — | Slew-rate control, tri-state buffers |
| Setup Time | — | 2 ns (typical via FastTrack) |
| Hold Time | — | 0 ns |
| RoHS-Status | — | [DATA_NEEDED: RoHS status] |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |