EPF6024ATC144-3 vs EPF6024ATC1442 Vergleich
Detaillierter Direktvergleich von EPF6024ATC144-3 von Intel und EPF6024ATC1442 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPF6024ATC144-3 - 24K Gates FLEX 6000 FPGA, 144-LQFP | Intel
EPF6024ATC144-3 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPF6024ATC144-3 | EPF6024ATC1442 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $14,10 | $37,25 |
| Family | FLEX 6000 | FLEX 6000 |
| Logic Elements / Cells | 1,960 | 1,960 |
| Usable Gates | 24,000 | — |
| Logic Array Blocks (LABs) | 196 | 196 |
| User I/Os | 117 | — |
| Number of I/O Banks | MultiVolt I/O (2.5 V / 3.3 V / 5.0 V) | — |
| Operating Frequency (max) | 142.86 MHz | — |
| Process Technology | 0.42 µm CMOS SRAM | 0.42 um CMOS |
| Core Voltage (VCCINT) | 3.3 V | — |
| I/O Voltage (VCCIO) | 2.5 V / 3.3 V / 5.0 V | — |
| Gehäuse | 144-LQFP (TQFP) | 144-pin LQFP (TQFP-144) |
| Speed Grade | -3 (mid speed bin) | ATC (industrial, -2 bin) |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | Industrial (per ATC grade; exact range [DATA_NEEDED: -40 C to +85 C typical]) |
| Configuration Interface | JTAG (IEEE 1149.1) + Passive Serial | — |
| Embedded Memory | Embedded Array Blocks (EABs), 2,048 bits each | — |
| RoHS-Status | unknown (legacy part) | [DATA_NEEDED: not stated in web snippets] |
| Montageart | Surface Mount | Surface Mount |
| MSL-Level | [DATA_NEEDED: MSL Level] | — |
| System Gates | — | 24,000 |
| Embedded Array Blocks (EABs) | — | Yes (number of EABs not stated in provided web snippets) |
| Maximum User I/O | — | 117 |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Supply Voltage (VCCIO) | — | [DATA_NEEDED: VCCIO nominal and bank tolerance] |
| Internal Clock Frequency (max) | — | 166.67 MHz |
| Configuration Method | — | SRAM, requires external configuration device (e.g., EPC2/EPC8) |
| JTAG Support | — | IEEE 1149.1 boundary-scan (per FLEX 6000 family) |
| Lead-Free | — | [DATA_NEEDED: not stated in web snippets] |