EPF81188AGC232-2A vs EPF81188AGC232-2 Vergleich
Detaillierter Direktvergleich von EPF81188AGC232-2A von Altera und EPF81188AGC232-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF81188AGC232-2A | EPF81188AGC232-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $92,00 | $92,00 |
| Family | FLEX 8000 | FLEX 8000 |
| Usable Gates | 12,000 | 12,000 |
| Logic Elements | 1,008 | — |
| Logic Cells | 1,008 | — |
| Maximum Internal Frequency | 125 MHz | — |
| Propagation Delay | 5 ns | — |
| User I/O Pins | 184 | 192 |
| Dedicated Inputs | 4 | — |
| Configuration Technology | SRAM (volatile, in-system reconfigurable) | — |
| Process Technology | 0.42 µm CMOS | 0.42 µm CMOS |
| I/O Voltage | 3.3 V or 5 V (configurable) | — |
| Gehäuse | CPGA-232 (Ceramic Pin Grid Array, 232 pins) | 232-pin CPGA (Ceramic Pin Grid Array) |
| Montageart | Through-Hole (CPGA) | Through-hole |
| Betriebstemperatur | [DATA_NEEDED: operating temperature grade] | — |
| In-Circuit Reconfigurability | Yes (external configuration device or intelligent host) | — |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| Output Function | Registered (D-type flip-flop per LE) | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Logic Elements (LEs) | — | 1,008 |
| Registers (max) | — | 1,500 |
| Maximum Operating Frequency | — | 125 MHz |
| Core Supply Voltage | — | 5 V |
| I/O Standards Supported | — | 3.3 V / 5 V configurable |
| Configuration Method | — | SRAM, in-circuit reconfigurable (ICR) via external device or JTAG |
| JTAG Boundary Scan | — | Yes (IEEE 1149.1) |
| Operating Temperature Grade | — | Commercial |
| Speed Grade | — | -2 |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |