EPF81188AQC208-2 vs EPF81188AQC208-4 Vergleich
Detaillierter Direktvergleich von EPF81188AQC208-2 von Altera und EPF81188AQC208-4 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF81188AQC208-2 - FLEX 8000 FPGA 12K Gates 148 I/O 5V | Intel / Altera
EPF81188AQC208-2 ObsoleteSpezifikationsvergleich
| Parameter | EPF81188AQC208-2 | EPF81188AQC208-4 |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $21,50 | $62,00 |
| Family | FLEX 8000 | FLEX 8000 |
| Logic Elements / Cells | 1008 | — |
| Total Usable Gates | 12,000 | — |
| Number of LABs | 126 | — |
| Number of I/O Pins | 148 | — |
| Number of Registers | 282 to 1500 | — |
| Maximum Operating Frequency | 125 MHz | 125 MHz |
| Core Supply Voltage | 5 V | — |
| I/O Supply Voltage | 3.3 V or 5.0 V (MultiVolt) | — |
| Configuration Method | Serial or Parallel SRAM, loaded at power-up via EPC1/EPC1064/EPC1213/EPC1441 | — |
| Gehäuse | 208-BFQFP (PQFP, plastic quad flat pack) | 208-pin BFQFP / PQFP (Plastic Quad Flat Pack) |
| Montageart | Surface Mount | Surface Mount (Gull-wing leads) |
| Betriebstemperatur | -40C to +85C (industrial / commercial grade) | 0°C to +70°C (Commercial) |
| RoHS-Status | [DATA_NEEDED: RoHS status - not stated in datasheet snippets] | [DATA_NEEDED: RoHS compliance] |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Process Technology | CMOS, 0.42 um SRAM configuration cell | 0.42 µm CMOS |
| PCI Compliance | Compliant with PCI Local Bus Specification (PCI SIG) | — |
| Embedded Array Blocks (EABs) | Yes (used for RAM/ROM functions) | — |
| In-Circuit Reconfigurability | Yes (via external configuration device) | — |
| Product Type | — | FPGA - Field Programmable Gate Array |
| Usable Gates | — | 12,000 |
| Logic Cells / Elements | — | 1,008 |
| Logic Array Blocks (LABs) | — | 126 |
| User I/Os | — | 148 |
| Supply Voltage (VCCINT) | — | 5 V |
| MultiVolt I/O | — | 3.3 V or 5.0 V |
| In-Circuit Reconfigurability (ICR) | — | Yes (JTAG-based) |
| Speed Grade | — | -4 (commercial) |
| Logic Family | — | CMOS SRAM-based |