EPF81500AQC240-2 vs EPF81188AQC240-3 Vergleich
Detaillierter Direktvergleich von EPF81500AQC240-2 von Altera und EPF81188AQC240-3 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPF81500AQC240-2 | EPF81188AQC240-3 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $61,40 | $30,00 |
| Family | FLEX 8000 | — |
| Logic Elements | 1296 | — |
| Number of Logic Array Blocks (LABs) | 162 | — |
| Number of I/Os | 181 | — |
| Versorgungsspannung | 4.75 V to 5.25 V | 4.75 V to 5.25 V (5 V nominal) |
| Speed Grade | -2 | -3 |
| Gehäuse | 240-BFQFP (240-pin Fine-pitch QFP, 32x32 mm) | 240-pin PQFP (BFQFP) 32x32 mm |
| Montageart | Surface Mount (gull-wing leads) | — |
| Configuration Memory | SRAM (volatile, requires configuration download on power-up) | — |
| Configuration Mode | Serial (BitBlaster) or parallel JTAG | — |
| Operating Temperature (Commercial) | 0 C to +70 C | — |
| Process Technology | CMOS SRAM, 5 V tolerant I/O | 0.42 µm CMOS |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | Non-compliant (per ICComponents listing) |
| Lead-Free | [DATA_NEEDED: lead-free terminal finish] | — |
| MSL-Level | [DATA_NEEDED: MSL moisture sensitivity level] | — |
| Manufacturer | — | Altera (now Intel) |
| Series | — | FLEX 8000 |
| Device Type | — | FPGA (Field-Programmable Gate Array) |
| Usable Gates | — | 12,000 |
| Logic Cells / Elements | — | 1,008 |
| Logic Array Blocks (LABs) | — | 126 |
| User I/Os | — | 184 |
| Maximum Toggle Frequency | — | 125 MHz |
| Betriebstemperatur | — | 0 °C to +70 °C (Commercial) |
| Configuration Method | — | SRAM, loaded at power-up via EPC1/EPC1213/EPC1064/EPC1441 or controller |
| Boundary-Scan Support | — | JTAG IEEE 1149.1 |
| In-Circuit Reconfigurability | — | Yes (ICR) |