EPF8452ALC84-3 vs EPF8282ALC84-4N Vergleich
Detaillierter Direktvergleich von EPF8452ALC84-3 von Altera und EPF8282ALC84-4N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF8452ALC84-3 - FLEX 8000 FPGA, 84-PLCC | Intel / Altera
EPF8452ALC84-3 ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPF8452ALC84-3 | EPF8282ALC84-4N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Letzte Kaufgelegenheit | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $23,85 |
| Family | FLEX 8000 | FLEX 8000 |
| Device Logic Elements | 336 | — |
| Usable Gates | 4,000 to 16,000 | 2,500 |
| Number of Registers | Up to 1,500 | — |
| User I/O Count | 68 | — |
| Versorgungsspannung | 5.0 V (core), 3.3 V or 5.0 V (I/O multiVolt) | — |
| Process Technology | 0.5 µm CMOS SRAM | 0.42 µm CMOS SRAM |
| Configuration Method | SRAM, serial or parallel EPROM | Serial (EPC1/EPC1064/EPC1213/EPC1441) or Parallel EPROM or Controller |
| Gehäuse | 84-LCC / 84-PLCC (J-Lead) | — |
| Pin-Anzahl | 84 | — |
| Montageart | Surface Mount (PLCC socket compatible) | Surface Mount (J-Lead) |
| Betriebstemperatur | 0°C to +70°C (commercial) | 0 °C to +70 °C (Commercial) |
| Speed Grade | -3 | — |
| JTAG Support | Yes (IEEE 1149.1 boundary scan) | — |
| On-chip PLL | Yes | — |
| Configuration Devices Supported | EPC1, EPC1213, EPC1064, EPC1441 | — |
| MultiVolt I/O | Yes (3.3 V and 5.0 V) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: RoHS compliance status] |
| Logic Elements | — | 208 |
| Maximum User I/Os | — | 68 |
| Package Type | — | 84-LCC (J-Lead) |
| Package Code | — | QCCJ (Plastic Leaded Chip Carrier, J-Bend) |
| Supply Voltage VCC | — | 5.0 V |
| Output Supply Voltage VCCIO | — | 3.3 V or 5.0 V (selectable) |
| Maximum Toggle Frequency | — | 125 MHz |
| In-Circuit Reconfigurability | — | Yes (ICR) |
| JTAG Boundary-Scan | — | Yes (IEEE 1149.1) |
| PCI Compliance | — | PCI Local Bus Specification compliant |
| Dedicated Inputs | — | 4 (synchronous control signals) |
| Logic Family | — | CMOS |