EPF8820AQC208-3 vs EPF8820AQC208-2 Vergleich
Detaillierter Direktvergleich von EPF8820AQC208-3 von Altera und EPF8820AQC208-2 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPF8820AQC208-2 - FLEX 8000 FPGA, 8K Gates, 152 I/O, 5V, PQFP-208 | Altera
EPF8820AQC208-2 ObsoleteSpezifikationsvergleich
| Parameter | EPF8820AQC208-3 | EPF8820AQC208-2 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $18,95 | $22,80 |
| Family | FLEX 8000 | FLEX 8000 |
| Device Type | FPGA (Field Programmable Gate Array) | FPGA - Field Programmable Gate Array |
| Logic Elements (LEs) | 672 | — |
| Usable Gates | 8,000 | 8,000 |
| Logic Array Blocks (LABs) | 84 | 84 (8 LEs per LAB) |
| User I/Os | 152 | 152 |
| Supply Voltage (VCC) | 4.75 V to 5.25 V (5 V nominal) | — |
| Betriebstemperatur | 0 C to 70 C (Commercial) | 0 C to 70 C (Commercial) |
| Gehäuse | 208-pin PQFP (Plastic Quad Flat Pack), 28 x 28 mm | — |
| Montageart | Surface Mount (Gull-Wing) | Surface Mount |
| Process Technology | CMOS SRAM | CMOS, SRAM-based configuration |
| Configuration Method | Serial or parallel EPROM (EPC1, EPC1064, EPC1213, EPC1441), system controller | In-Circuit Reconfigurability (ICR) via external device; SRAM-volatile |
| Boundary Scan | JTAG IEEE 1149.1 | — |
| In-Circuit Reconfigurability | Yes (ICR) | — |
| Speed Grade | -3 | — |
| Lebenszyklusstatus | Obsolete (EOL) | — |
| RoHS-Status | [DATA_NEEDED: RoHS status] | [DATA_NEEDED: rohs status not specified in provided data] |
| Manufacturer | — | Altera (Intel PSG) |
| Logic Cells / Registers | — | 672 |
| Maximum Operating Frequency | — | 125 MHz |
| Versorgungsspannung | — | 5 V |
| Logic Family | — | CMOS |
| Package Type | — | 208-BFQFP / 208-Pin PQFP (FQFP) |
| Package Code | — | FQFP, gull-wing terminals |
| JTAG / Boundary Scan | — | IEEE 1149.1 compliant |
| Grade | — | Commercial |