EPM1270F256C5N vs EPM1270F256C5 Vergleich
Detaillierter Direktvergleich von EPM1270F256C5N von Altera und EPM1270F256C5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM1270F256C5N | EPM1270F256C5 |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $16,20 | $25,40 |
| Series | MAX II | MAX II |
| Family | EPM1270 | EPM1270 |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Number of Macrocells | 980 | — |
| Number of Logic Elements | 1270 | — |
| Number of User I/O | 212 | — |
| Propagation Delay (tPD) | 6.2 ns | — |
| Maximum Frequency (fMAX) | 201.1 MHz | — |
| Supply Voltage - Internal | 2.5 V / 3.3 V | — |
| Betriebstemperatur | 0°C to 85°C (TJ) | 0 °C to +85 °C (commercial, 'C' grade) |
| Montageart | Surface Mount | — |
| Gehäuse / Bauform | 256-FBGA (256-BGA) | — |
| Supplier Device Package | 256-FBGA | — |
| Process Technology | 0.18 µm | 0.18 µm |
| Programmable Type | Non-volatile flash, in-system programmable | — |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | JTAG (IEEE 1149.1) / ISP via ByteBlaster / USB-Blaster |
| RoHS-Status | Details (per distributor product page) | Compliant |
| Macro Cells | — | 980 |
| Logic Array Blocks (LABs) | — | 16 |
| Maximum User I/O Pins | — | 212 |
| Pin-to-Pin Logic Delay (tPD) | — | 6.2 ns (C5 speed grade) |
| Internal Operating Frequency | — | 201.1 MHz |
| Core Supply Voltage | — | 2.5 V / 3.3 V |
| I/O Standards Supported | — | LVCMOS/LVTTL 1.8 V, 2.5 V, 3.3 V, 5.0 V (MultiVolt) |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| User Flash Memory | — | 8 Kbits |
| Gehäuse | — | 256-ball FineLine BGA (FBGA-256) |