EPM2210F256A5NGA vs EPM2210F256C5 Vergleich
Detaillierter Direktvergleich von EPM2210F256A5NGA von Intel und EPM2210F256C5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM2210F256C5 - MAX II CPLD 1700 Macrocells 201MHz FBGA-256 | Altera / Intel
EPM2210F256C5 NrndSpezifikationsvergleich
| Parameter | EPM2210F256A5NGA | EPM2210F256C5 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $48,75 | $14,95 |
| Family | MAX II | — |
| Logic Elements | 2210 | — |
| Macrocells | 1700 | — |
| Maximum Propagation Delay (tPD) | 7 ns (A5 speed grade) | — |
| User I/O Pins | 212 | — |
| Core Voltage | 1.8 V | — |
| Betriebstemperaturbereich | 0C to +85C (NGA, commercial) | — |
| Gehäuse | 256-ball FineLine BGA (NGA) | 256-ball FineLine BGA (FBGA-256) |
| Montageart | Surface Mount | Surface Mount |
| Programmable Logic Blocks | 16 Logic Array Blocks | — |
| User Flash Memory | 8 Kbits (typical for MAX II family) | — |
| Configuration Method | On-chip Flash, in-system programmable via JTAG | — |
| I/O Standards | LVTTL, LVCMOS, PCI, LVDS (per bank) | — |
| RoHS-Status | [DATA_NEEDED: rohs status from manufacturer] | Compliant |
| Lead-Free / Halogen-Free | [DATA_NEEDED: lead-free / halogen-free status] | — |
| Device Family | — | MAX II |
| Series | — | EPM2210 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Macro Cells (Logic Elements) | — | 1700 |
| Maximum Internal Frequency | — | 201.1 MHz |
| Propagation Delay | — | 5 ns (C5 speed grade) |
| User I/Os | — | 272 |
| Versorgungsspannung | — | 2.5 V / 3.3 V (MultiVolt I/O) |
| Process Technology | — | 0.18 µm flash-based |
| Package Code | — | BGA, 17 x 17 mm, 1.0 mm pitch |
| Betriebstemperatur | — | 0C to +85C (commercial, C5 suffix) |
| Programming Interface | — | JTAG (IEEE 1149.1), in-system programmable |
| Configuration Memory | — | On-chip flash (instant-on, non-volatile) |
| On-chip User Flash Memory | — | 8 Kbits |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |