EPM2210F256C4N vs EPM1270F256C5 Vergleich
Detaillierter Direktvergleich von EPM2210F256C4N von Intel und EPM1270F256C5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM2210F256C4N | EPM1270F256C5 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $39,85 | $25,40 |
| Family | MAX II | EPM1270 |
| Device Type | CPLD | — |
| Logic Elements (LE) | 2210 | — |
| Macro Cells | 1700 | 980 |
| User Flash Memory | 204 Kbit | 8 Kbits |
| Maximum Internal Frequency | 247.5 MHz | — |
| Pin-to-Pin Propagation Delay (tPD) | 7.0 ns | — |
| Maximum User I/O Pins | 212 (varies with package) | 212 |
| Global Clock Networks | 4 | — |
| Process Technology | 0.18 µm | 0.18 µm |
| Core Supply Voltage | 3.0 V to 3.6 V (3.3 V typical) | 2.5 V / 3.3 V |
| MultiVolt I/O Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS, PCI 66 MHz | — |
| Betriebstemperaturbereich | 0 °C to +85 °C (Commercial) | — |
| Gehäuse | 256-ball FineLine BGA (FBGA) | 256-ball FineLine BGA (FBGA-256) |
| Programming Interface | JTAG IEEE Std. 1149.1 + ISP | JTAG (IEEE 1149.1) / ISP via ByteBlaster / USB-Blaster |
| Montageart | Surface Mount (BGA) | — |
| RoHS-Status | Compliant | Compliant |
| Lead-Free | Yes | — |
| Series | — | MAX II |
| Logic Array Blocks (LABs) | — | 16 |
| Pin-to-Pin Logic Delay (tPD) | — | 6.2 ns (C5 speed grade) |
| Internal Operating Frequency | — | 201.1 MHz |
| I/O Standards Supported | — | LVCMOS/LVTTL 1.8 V, 2.5 V, 3.3 V, 5.0 V (MultiVolt) |
| Configuration Memory | — | On-chip flash (non-volatile, instant-on) |
| Betriebstemperatur | — | 0 °C to +85 °C (commercial, 'C' grade) |