EPM2210F256C4N vs EPM2210F256C5 Vergleich
Detaillierter Direktvergleich von EPM2210F256C4N von Intel und EPM2210F256C5 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM2210F256C5 - MAX II CPLD 1700 Macrocells 201MHz FBGA-256 | Altera / Intel
EPM2210F256C5 NrndSpezifikationsvergleich
| Parameter | EPM2210F256C4N | EPM2210F256C5 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $39,85 | $14,95 |
| Family | MAX II | — |
| Device Type | CPLD | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LE) | 2210 | — |
| Macro Cells | 1700 | — |
| User Flash Memory | 204 Kbit | — |
| Maximum Internal Frequency | 247.5 MHz | 201.1 MHz |
| Pin-to-Pin Propagation Delay (tPD) | 7.0 ns | — |
| Maximum User I/O Pins | 212 (varies with package) | — |
| Global Clock Networks | 4 | — |
| Process Technology | 0.18 µm | 0.18 µm flash-based |
| Core Supply Voltage | 3.0 V to 3.6 V (3.3 V typical) | — |
| MultiVolt I/O Standards | 1.5 V / 1.8 V / 2.5 V / 3.3 V LVTTL/LVCMOS, PCI 66 MHz | — |
| Betriebstemperaturbereich | 0 °C to +85 °C (Commercial) | — |
| Gehäuse | 256-ball FineLine BGA (FBGA) | 256-ball FineLine BGA (FBGA-256) |
| Programming Interface | JTAG IEEE Std. 1149.1 + ISP | JTAG (IEEE 1149.1), in-system programmable |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | Compliant |
| Lead-Free | Yes | — |
| Device Family | — | MAX II |
| Series | — | EPM2210 |
| Macro Cells (Logic Elements) | — | 1700 |
| Propagation Delay | — | 5 ns (C5 speed grade) |
| User I/Os | — | 272 |
| Versorgungsspannung | — | 2.5 V / 3.3 V (MultiVolt I/O) |
| Package Code | — | BGA, 17 x 17 mm, 1.0 mm pitch |
| Betriebstemperatur | — | 0C to +85C (commercial, C5 suffix) |
| Configuration Memory | — | On-chip flash (instant-on, non-volatile) |
| On-chip User Flash Memory | — | 8 Kbits |
| MSL-Level | — | 3 (per JEDEC J-STD-020) |