EPM240F100C5N vs EPM240GF100C5N Vergleich
Detaillierter Direktvergleich von EPM240F100C5N von Intel und EPM240GF100C5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240F100C5N | EPM240GF100C5N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,20 | $8,92 |
| Device Family | MAX II | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | 4.7 ns |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | 201.1 MHz |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| Gehäuse | 100-ball FineLine BGA (FBGA-100) | 100-ball FBGA (11 x 11 mm, 1.0 mm pitch) |
| Betriebstemperaturbereich | 0C to +85C (commercial) | — |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | On-chip non-volatile Flash |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Interface | JTAG / ByteBlasterMV | JTAG (IEEE 1149.1) / Jam STAPL |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | Lead Free, RoHS compliant |
| Family | — | MAX II |
| Logic Elements / Macro Cells | — | 192 macro cells |
| User I/Os | — | 80 |
| Logic Family | — | CMOS |
| Process Technology | — | 0.18 um |
| Core Supply Voltage (VCCINT) | — | 1.8 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| User Flash Memory | — | 8 Kbits |
| Betriebstemperatur | — | -40 C to +125 C |