EPM240F100C5N vs EPM240GT100C5 Vergleich
Detaillierter Direktvergleich von EPM240F100C5N von Intel und EPM240GT100C5 von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240F100C5N | EPM240GT100C5 |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,20 | $4,35 |
| Device Family | MAX II | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | — |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | [DATA_NEEDED: fMAX internal] |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| Gehäuse | 100-ball FineLine BGA (FBGA-100) | 100-pin TQFP (14 x 14 mm) |
| Betriebstemperaturbereich | 0C to +85C (commercial) | — |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | — |
| JTAG Support | IEEE 1149.1 boundary-scan | — |
| Programming Interface | JTAG / ByteBlasterMV | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | Compliant |
| Series | — | MAX II |
| Family | — | MAX II G |
| Logic Elements | — | 240 |
| Equivalent Macrocells | — | 192 |
| User I/O Pins | — | 80 |
| Logic Blocks / LABs | — | 24 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns (C5 speed grade) |
| User Flash Memory (UFM) | — | 8 Kbits |
| Programmable Type | — | In-System Programmable (Flash) |
| Core Supply Voltage (VCCINT) | — | 1.71 V to 1.89 V (1.8 V typical) |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) |
| Betriebstemperatur | — | 0C to +85C (commercial) |
| MSL-Level | — | 3 (168 hours) |
| JTAG / ISP | — | Yes (IEEE 1532 compliant) |