EPM240F100C5N vs EPM240M100C5N Vergleich
Detaillierter Direktvergleich von EPM240F100C5N von Intel und EPM240M100C5N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240F100C5N | EPM240M100C5N |
|---|---|---|
| Marke | Intel | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,20 | $4,25 |
| Device Family | MAX II | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | 192 |
| User I/O Pins (maximum) | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Operating Frequency | [DATA_NEEDED: fmax per datasheet] | — |
| Global Clock Networks | [DATA_NEEDED: count] | — |
| Gehäuse | 100-ball FineLine BGA (FBGA-100) | 100-ball MBGA (Micro FBGA), 6 x 6 mm, 0.5 mm pitch |
| Betriebstemperaturbereich | 0C to +85C (commercial) | — |
| Supply Voltage Core (VCCINT) | 3.3 V | — |
| I/O Bank Voltage (VCCIO) | 1.5V / 1.8V / 2.5V / 3.3V (MultiVolt) | — |
| Configuration Memory | Non-volatile flash (instant-on) | On-chip Flash (non-volatile) |
| JTAG Support | IEEE 1149.1 boundary-scan | IEEE 1149.1 boundary-scan |
| Programming Interface | JTAG / ByteBlasterMV | — |
| Montageart | Surface Mount (BGA) | Surface Mount |
| RoHS-Status | Compliant | Compliant (lead-free) |
| Family | — | MAX II |
| Logic Elements | — | 240 |
| User I/Os | — | 80 |
| Propagation Delay (tPD) | — | 4.7 ns |
| User Flash Memory | — | 8 Kbits |
| Supply Voltage - Core | — | 1.8 V |
| Supply Voltage - I/O | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Betriebstemperatur | — | -40 C to +125 C |
| Process Technology | — | 0.18 µm CMOS |
| Logic Family | — | CMOS |