EPM240GT100C5N vs EPM240T100C3N Vergleich
Detaillierter Direktvergleich von EPM240GT100C5N von Altera und EPM240T100C3N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240GT100C5N | EPM240T100C3N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,20 | $9,05 |
| Family | MAX II | — |
| Series | EPM240 | MAX II |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Logic Elements (LEs) | 240 | — |
| Macrocells | 192 | 192 |
| User I/Os | 80 | — |
| Pin-to-Pin Delay (tPD) | 4.7 ns | — |
| User Flash Memory (UFM) | 8 Kbits | 8 Kbits |
| Core Supply Voltage (VCCINT) | 2.5 V or 3.3 V | 3.0 V to 3.6 V |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Betriebstemperatur | 0C to +85C (Commercial) | 0 °C to +85 °C (commercial) |
| Gehäuse | 100-pin TQFP (T100) | 100-pin TQFP (14x14 mm) |
| Montageart | Surface Mount | Surface Mount |
| Programmable Type | In-System Programmable (ISP) via JTAG | — |
| Configuration Memory | Non-volatile Flash (instant-on) | Internal Flash (non-volatile) |
| MSL-Level | 3 | [DATA_NEEDED: MSL rating] |
| RoHS-Status | Compliant | Compliant |
| Device Family | — | MAX II CPLD (EPM240) |
| Logic Elements (LE) | — | 240 |
| User I/O Pins | — | 80 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.4 ns (typical) |
| Maximum Operating Frequency | — | 200 MHz (internal oscillator) |
| Programming Interface | — | JTAG (IEEE 1149.1) / ISP |
| Quiescent Current (typical) | — | 35 mA |