EPM240T100A5N vs EPM240GT100C5N Vergleich
Detaillierter Direktvergleich von EPM240T100A5N von Altera und EPM240GT100C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM240T100A5N | EPM240GT100C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $7,05 | $9,20 |
| Family | MAX II | MAX II |
| Macro Cells | 192 | — |
| Logic Elements (LE) | 240 | — |
| User I/O Count | 80 | — |
| Pin-to-Pin Logic Delay (tPD) | 4.7 ns | — |
| Maximum Internal Frequency | 201.1 MHz | — |
| Versorgungsspannung | 2.5 V / 3.3 V | — |
| I/O Bank Count | 4 (multi-voltage) | — |
| Process Technology | 0.18 µm | — |
| Configuration Memory | On-chip Flash (instant-on) | Non-volatile Flash (instant-on) |
| Programming Interface | JTAG (IEEE 1149.1) / ISP | — |
| Gehäuse | 100-pin TQFP (14 x 14 x 1.0 mm) | 100-pin TQFP (T100) |
| Betriebstemperatur | 0C to +85C (commercial, "A5N" suffix) | 0C to +85C (Commercial) |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | Compliant (Pb-free) | Compliant |
| Series | — | EPM240 |
| Device Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Elements (LEs) | — | 240 |
| Macrocells | — | 192 |
| User I/Os | — | 80 |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| User Flash Memory (UFM) | — | 8 Kbits |
| Core Supply Voltage (VCCINT) | — | 2.5 V or 3.3 V |
| I/O Supply Voltage (VCCIO) | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V |
| Programmable Type | — | In-System Programmable (ISP) via JTAG |
| MSL-Level | — | 3 |