EPM240ZM100C7N vs EPM240GM100C5N Vergleich
Detaillierter Direktvergleich von EPM240ZM100C7N von Altera und EPM240GM100C5N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM240GM100C5N - 192-Cell MAX II G CPLD, 4.7ns, 100-MBGA | Intel / Altera
EPM240GM100C5N ✓ AktivSpezifikationsvergleich
| Parameter | EPM240ZM100C7N | EPM240GM100C5N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Aktiv | Aktiv |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $6,10 | $4,75 |
| Family | MAX II Z | MAX II G |
| Series | MAX II | — |
| Logic Elements | 240 | 240 (192 macrocells) |
| Macrocells | 192 | — |
| Pin-to-Pin Logic Delay (tPD) | 7.5 ns | — |
| User I/Os | 80 | 80 |
| User Flash Memory (UFM) | 8 Kbits | — |
| Core Supply Voltage (VCCINT) | 1.8 V | — |
| I/O Supply Voltage (VCCIO) | 1.5 V / 1.8 V / 2.5 V / 3.3 V (MultiVolt) | — |
| Gehäuse | 100-MBGA (Micro FineLine BGA), 6 x 6 mm | 100-MBGA (Micro FineLine BGA), 6 x 6 mm |
| Configuration Memory | On-chip non-volatile flash | Non-volatile Flash |
| Process Technology | 0.18 µm 6-layer-metal flash | CMOS, Flash-based |
| JTAG Support | IEEE 1149.1 (programming + boundary-scan) | — |
| Betriebstemperatur | 0 °C to +85 °C (commercial) | -40 C to +125 C |
| Montageart | Surface Mount (BGA) | Surface Mount (BGA) |
| Lead-Free / RoHS | Compliant per datasheet | — |
| Pin-to-Pin Delay (tPD) | — | 4.7 ns |
| Ball Pitch | — | 0.5 mm |
| Supply Voltage - Core | — | 3.3 V |
| I/O Voltage Support | — | 1.5 V / 1.8 V / 2.5 V / 3.3 V (multiVolt) |
| Programming Interface | — | JTAG (IEEE 1149.1) - ISP |
| Lead Free / RoHS | — | Yes / Compliant |
| MSL-Level | — | 3 |