EPM3032A-TC44-10N vs EPM3032ALC-44-10N Vergleich
Detaillierter Direktvergleich von EPM3032A-TC44-10N von Altera und EPM3032ALC-44-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3032ALC-44-10N - MAX 3000A CPLD, 32MC, 10ns, 44-PLCC | Altera
EPM3032ALC-44-10N ⚠ Letzte BestellmöglichkeitSpezifikationsvergleich
| Parameter | EPM3032A-TC44-10N | EPM3032ALC-44-10N |
|---|---|---|
| Marke | Altera | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Letzte Kaufgelegenheit |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $5,40 | $5,45 |
| Manufacturer | Altera (now Intel) | — |
| Series | MAX 3000A | — |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 32 | 32 |
| Usable Gates | 600 | — |
| Logic Elements / LABs | 2 Logic Array Blocks | — |
| User I/O Pins | 34 | 34 |
| Anzahl der Pins | 44 | — |
| Gehäuse | 44-pin TQFP | 44-pin PLCC |
| Pin-to-Pin Delay (tPD) | 10 ns (commercial speed grade) | — |
| Counter Frequency (fCNT) | up to 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | — |
| Programming Technology | EEPROM (in-system programmable via JTAG / IEEE 1532) | — |
| Output Enables | 6 global OE signals | — |
| Betriebstemperatur | [DATA_NEEDED: operating temperature range] | 0C to +70C (commercial, -N suffix) |
| RoHS-Status | [DATA_NEEDED: RoHS compliance status] | [DATA_NEEDED: RoHS status] |
| Montageart | Surface Mount | Surface Mount (PLCC socket compatible) |
| Process Technology | CMOS EEPROM | — |
| Product Type | — | CPLD - Complex Programmable Logic Device |
| Logic Array Blocks (LABs) | — | 2 |
| Gates | — | 600 |
| Pin-to-Pin Logic Delay (tPD) | — | 4.5 ns |
| Counter Frequency (max) | — | 227.3 MHz |
| Speed Grade | — | -10 (10 ns) |
| Supply Voltage (Core) | — | 3.3 V |
| I/O Logic Compatibility | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| Programming Interface | — | JTAG (IEEE Std. 1149.1) / ISP (IEEE Std. 1532) |
| Configuration Memory | — | EEPROM (non-volatile) |
| Lead-Free | — | [DATA_NEEDED: lead-free status] |