EPM3032ALC44-10 vs EPM3032ALC44-10N Vergleich
Detaillierter Direktvergleich von EPM3032ALC44-10 von Intel und EPM3032ALC44-10N von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Intel
EPM3032ALC44-10 - MAX 3000A CPLD, 32 Macrocells, 10ns, 44-PLCC | Intel / Altera
EPM3032ALC44-10 ObsoleteSpezifikationsvergleich
| Parameter | EPM3032ALC44-10 | EPM3032ALC44-10N |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $0,98 | $0,94 |
| Family | MAX 3000A | MAX 3000A |
| Device Type | CPLD (Complex Programmable Logic Device) | — |
| Macrocells | 32 | 32 |
| Logic Array Blocks (LABs) | 2 | 2 |
| Usable Gates | 600 | — |
| Maximum User I/O Pins | 34 | — |
| Pin-to-Pin Delay (tPD) | 10 ns | — |
| Maximum Counter Frequency | 227.3 MHz | — |
| Supply Voltage (VCCINT) | 3.3 V | 3.3 V |
| In-System Programming | Yes - JTAG (IEEE Std. 1149.1) | — |
| Concurrent ISP | Yes - IEEE Std. 1532 | — |
| Process Technology | CMOS EEPROM | — |
| Gehäuse | 44-pin PLCC (J-Lead) | 44-pin PLCC (J-Lead, surface mount) |
| Betriebstemperatur | 0C to +70C (commercial) | [DATA_NEEDED: industrial/commercial range] |
| Montageart | Surface Mount / Socket | Surface Mount |
| Product Type | — | CPLD (Complex Programmable Logic Device) |
| Logic Gates | — | 600 gates |
| User I/O Pins | — | 34 |
| Propagation Delay (tPD) | — | 10 ns |
| Internal fMAX | — | 103.1 MHz |
| I/O Voltage (VCCIO) | — | 1.8 V / 2.5 V / 3.3 V / 5.0 V (MultiVolt I/O) |
| Technology | — | CMOS EEPROM-based |
| In-System Programmability | — | Yes, via IEEE 1149.1 JTAG |
| ISP Standard Compliance | — | IEEE Std. 1532 |
| Boundary-Scan Test (BST) | — | Yes, IEEE 1149.1 compliant |
| RoHS-Status | — | [DATA_NEEDED: compliant or non-compliant] |