EPM3032ATC44-10AA vs EPM3032ATC44-10 Vergleich
Detaillierter Direktvergleich von EPM3032ATC44-10AA von Intel und EPM3032ATC44-10 von Altera. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Spezifikationsvergleich
| Parameter | EPM3032ATC44-10AA | EPM3032ATC44-10 |
|---|---|---|
| Marke | Intel | Altera |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | NRND |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $2,95 | $0,78 |
| Series | MAX 3000A | MAX 3000A |
| Family | CPLD - Complex Programmable Logic | CPLD MAX 3000A |
| Macro Cells | 32 | — |
| Logic Array Blocks (LABs) | 2 | — |
| Usable Gates | 600 | — |
| Number of I/O | 34 | — |
| Propagation Delay (tPD) | 10 ns (max, -10 speed grade) | 10 ns |
| Counter Frequency | 227.3 MHz (max) | — |
| Supply Voltage - Core (VCCINT) | 3.0 V to 3.6 V (3.3 V nominal) | — |
| Supply Voltage - I/O (VCCIO) | 2.5 V / 3.3 V / 5.0 V selectable | — |
| Betriebstemperatur | 0C to +70C (commercial, 'C' suffix) | 0 °C to +70 °C (commercial, 'C' grade) |
| Gehäuse | 44-TQFP (10 mm x 10 mm) | 44-pin TQFP (10x10 mm) |
| Montageart | Surface Mount | Surface Mount |
| Programmable Type | EEPROM (in-system programmable) | — |
| JTAG Interface | IEEE Std. 1149.1 boundary scan + IEEE Std. 1532 ISP | — |
| RoHS-Status | Compliant (lead-free 'A' suffix) | Compliant |
| Number of Macrocells | — | 32 |
| Number of Logic Array Blocks (LABs) | — | 2 |
| Number of Usable Gates | — | 600 |
| Number of I/O Pins | — | 34 |
| Maximum Internal Frequency | — | 227.3 MHz |
| Supply Voltage (VCCINT) | — | 3.0 V to 3.6 V (3.3 V typical) |
| I/O Voltage Tolerance | — | MultiVolt (1.8 V / 2.5 V / 3.3 V / 5.0 V) |
| Technology | — | CMOS EEPROM |
| In-System Programming | — | Yes (IEEE 1149.1 JTAG) |
| MSL-Level | — | [DATA_NEEDED: MSL Level] |
| Lead-Free | — | Yes |