EPM3032ATC44-10NAA vs EPM3032ATC44-10N Vergleich
Detaillierter Direktvergleich von EPM3032ATC44-10NAA von Altera und EPM3032ATC44-10N von Intel. Vergleichen Sie die wichtigsten Spezifikationen, elektrischen Parameter, Gehäuse, Lebenszyklusstatus, Preise und Verfügbarkeit, um das beste Bauteil für Ihre Designanforderungen zu ermitteln.
Altera
EPM3032ATC44-10NAA - 32-Macrocell MAX 3000A CPLD, 44-TQFP | Altera
EPM3032ATC44-10NAA ObsoleteSpezifikationsvergleich
| Parameter | EPM3032ATC44-10NAA | EPM3032ATC44-10N |
|---|---|---|
| Marke | Altera | Intel |
| Kategorie | FPGA & CPLD | FPGA & CPLD |
| Lebenszyklusstatus | Obsolete | Obsolete |
| Lagerstatus | In Stock | In Stock |
| Stückpreis (USD) | $9,95 | $2,46 |
| Family | MAX 3000A | — |
| Device Type | CPLD - Complex Programmable Logic Device | — |
| Number of Macrocells | 32 | — |
| Number of Logic Array Blocks (LABs) | 2 | — |
| Usable Gates | 600 | 600 |
| Number of User I/O Pins | 34 | — |
| Propagation Delay (tpd) | 10 ns | — |
| Maximum Internal Frequency | [DATA_NEEDED: fmax spec] | — |
| Core Supply Voltage | 3.3 V | — |
| I/O Logic Levels Supported | 5.0 V / 3.3 V / 2.5 V (MultiVolt) | — |
| Programming Technology | CMOS EEPROM (non-volatile) | — |
| In-System Programming | IEEE Std. 1149.1 JTAG + IEEE Std. 1532 | — |
| Hot-Socketing Support | Yes | — |
| Gehäuse | 44-pin TQFP | 44-pin TQFP |
| Betriebstemperaturbereich | [DATA_NEEDED: operating temperature] | — |
| Montageart | Surface Mount | Surface Mount |
| RoHS-Status | [DATA_NEEDED: RoHS status] | Compliant (lead-free) |
| Lead-Free | [DATA_NEEDED: lead-free status] | — |
| Series | — | MAX 3000A |
| Device Family | — | CPLD - Complex Programmable Logic Device |
| Macrocells | — | 32 |
| Logic Array Blocks (LABs) | — | 2 |
| User I/O Pins | — | 34 |
| Pin-to-Pin Logic Delay (tPD) | — | 10 ns |
| Maximum Counter Frequency (fCNT) | — | 138.9 MHz |
| Core Supply Voltage (VCCINT) | — | 3.3 V |
| I/O Logic Level Support | — | 5.0 V / 3.3 V / 2.5 V (MultiVolt) |
| In-System Programmability | — | Yes, IEEE 1149.1 JTAG |
| ISP Standard Compliance | — | IEEE Std. 1532 |
| Open-Drain I/O Option | — | Yes, per pin |
| Configuration Memory | — | EEPROM (non-volatile, instant-on) |
| Operating Temperature (Commercial) | — | 0 C to +70 C |